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Volumn 1, Issue 1, 2004, Pages 62-93

TRIPS: A Polymorphous Architecture for Exploiting ILP, TLP, and DLP

Author keywords

Computer Architecture; Computer Systems; Configurable Computing; High Performance Computing; ScAlable

Indexed keywords


EID: 84905483003     PISSN: 15443566     EISSN: 15443973     Source Type: Journal    
DOI: 10.1145/980152.980156     Document Type: Article
Times cited : (67)

References (45)
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    • Ranganathan, N.1    Franklin, M.2
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    • Combining hyperblocks and exit prediction to increase front-end bandwidth and performance
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    • Ranganathan, N., Nagarajan, R., Burger, D., and Keckler, S. W. 2002. Combining hyperblocks and exit prediction to increase front-end bandwidth and performance. Tech. Rep. TR-02-41, Department of Computer Sciences, The University of Texas at Austin.
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    • Ranganathan, N.1    Nagarajan, R.2    Burger, D.3    Keckler, S.W.4
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.