Tarantula: A vector extension to the Alpha architecture

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn , Issue , 2002, Pages 281-292

  Espasa, Roger ^a   Ardanaz, Federico ^a   Emer, Joel ^b   Felix, Stephen ^b   Gago, Julio ^a   Gramunt, Roger ^a   Hernandez, Isaac ^a   Juan, Toni ^a   Lowney, Geoff ^b   Mattina, Matthew ^b   Seznec, André ^b  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^b HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; BENCHMARKING; CACHE MEMORY; COMPUTER ARCHITECTURE; MICROPROCESSOR CHIPS; TRANSISTORS;

MEMORY ACCESSES; VIRTUAL-MEMORY;

CMOS INTEGRATED CIRCUITS;

EID: 0036292604     PISSN: 08847495     EISSN: None     Source Type: Journal    
DOI: 10.1109/ISCA.2002.1003586     Document Type: Article

References (22)

1. The TO vector microprocessor
2. Alpha 21364: A scalable single-chip SMP
3. Compaq chooses SMT for Alpha
4. Simultaneous multithreading: Multiplying alpha’s performance
5. Asim: A performance model framework
6. Exploiting instruction- and data-level parallelism
7. Alpha 21364 to ease memory bottlenck
8. The effect of local sort on parallel sorting algorithms
9. The 21264: A superscalar alpha processor with out-of-order execution
10. Memory bandwidth and machine balance in current high performance computers
11. Adding a vector unit to a superscalar processor
12. New tiling techniques to improve cache temporal locality
13. Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading processor
14. Simultaneous multithreading: Maximizing on-chip parallelism
15. Increasing the number of strides for conflict-tree vector access
16. Conflict-free access for streams in multimodule memories
17. Spert-II: A vector microprocessor system