Computer baring it all to software: Raw machines

Computer

Volumn 30, Issue 9, 1997, Pages 86-93

  Waingold, Elliot ^a,b,r   Taylor, Michael ^a,c,r   Srikrishna, Devabhaktuni ^a,d,e,r   Sarkar, Vivek ^a,f,g,r   Lee, Walter ^a,f,r   Lee, Victor ^a,h,i,r   Kim, Jang ^a,j,r   Frank, Matthew ^a,f,k,r   Finch, Peter ^a,f,r   Barua, Rajeev ^a,f,l,r   Babb, Jonathan ^a,m,n,r   Amarasinghe, Saman ^a,f,o,p,r   Agarwal, Anant ^a,j,m,p,q,r  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b MIT's Lab for Computer Science   (United States)

^c DARTMOUTH COLLEGE   (United States)

^d CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

^e Mathematical Association of America   (United States)

^f Laboratory for Computer Science

^g IBM   (United States)

^h INTEL CORPORATION   (United States)

ⁱ UNIVERSITY OF WASHINGTON   (United States)

^j Intel Corp ^*

^k UNIVERSITY OF WISCONSIN MADISON   (United States)

^l INDIAN INSTITUTE OF TECHNOLOGY DELHI   (India)

^m Virtual Machine Works Inc

ⁿ GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^o Department of Molecular Biology and Genetics   (United States)

^p STANFORD UNIVERSITY   (United States)

^q INDIAN INSTITUTE OF TECHNOLOGY MADRAS   (India)

^r MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

more..

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SOFTWARE; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS; PROGRAM COMPILERS;

RAW PROCESSORS;

COMPUTER ARCHITECTURE;

EID: 0031236158     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/2.612254     Document Type: Article

References (7)

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2. V. Sarkar and J.L. Hennessy, "Compile-Time Partitioning and Scheduling of Parallel Programs," Proc. ACM SIGPLAN '86 Symp. Compiler Construction, ACM Press, New York, 1986, pp. 17-26.
3. J. Babb et al., "Logic Emulation with Virtual Wires," IEEE Trans. CAD, 1997, to appear.
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5. A.V. Aho, M. Ganapathi, and S.W.K. Tjiang, "Code Generation Using Tree Matching and Dynamic Programming," ACM Trans. Programming Languages and Systems, Oct. 1989, pp. 491-516.
6. S. Hinrichs et al., "An Architecture for Optimal All-to-All Personalized Communication," Proc. Sixth Ann. ACM Symp. Parallel Algorithms and Architectures, ACM Press, New York, 1994, pp. 310-319.
7. G.S. Sohi, S. Breach, and T.N. Vijaykumar, "Multiscalar Processors," Proc. 22nd Int'l Symp. Computer Architecture, IEEE CS Press, Los Alamitos, Calif., 1995, pp. 414-425.