Software-based self-test methodology for crosstalk faults in processors

Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT

Volumn 2003-January, Issue , 2003, Pages 11-16

  Bai, Xiaoliang ^a   Chen, Li ^a   Dey, S ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Automatic test pattern generation; Automatic testing; Built in self test; Circuit faults; Circuit testing; Crosstalk; Power supplies; Temperature sensors; Timing; Voltage

Indexed keywords

AUTOMATIC PROGRAMMING; AUTOMATIC TEST PATTERN GENERATION; AUTOMATIC TESTING; COSTS; CROSSTALK; DATA COMPRESSION; ELECTRIC POTENTIAL; INTEGRATED CIRCUIT TESTING; MICROPROCESSOR CHIPS; SEMICONDUCTOR DEVICE MANUFACTURE; SOFTWARE TESTING; SYSTEM-ON-CHIP; TEMPERATURE SENSORS; TIMING CIRCUITS;

ARTIFICIAL TESTING ENVIRONMENT; AUTOMATIC TEST PATTERN GENERATION TOOLS; AUTOMATIC TEST PROGRAM GENERATIONS; CIRCUIT FAULTS; CIRCUIT TESTING; CONTROLLABILITY AND OBSERVABILITIES; POWER SUPPLY; TIMING;

BUILT-IN SELF TEST;

EID: 84882881385     PISSN: 15526674     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HLDVT.2003.1252468     Document Type: Conference Paper

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