Test program synthesis for path delay faults in microprocessor cores

IEEE International Test Conference (TC)

Volumn , Issue , 2000, Pages 1080-1089

  Lai, Wei Cheng ^a   Krstic, Angela ^a   Cheng, Kwang Ting ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; DELAY CIRCUITS; DESIGN FOR TESTABILITY; MICROPROCESSOR CHIPS; SOFTWARE PROTOTYPING;

EMBEDDED SOFTWARE TESTER SOLUTION; FUNCTIONAL SELF TEST; MICROPROCESSOR CORES; PATH DELAY FAULTS; SYSTEM ON CHIP DEVICES;

INTEGRATED CIRCUIT TESTING;

EID: 0034482483     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (24)