DEFUSE: a deterministic functional self-test methodology for processors

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2000, Pages 255-262

  Chen, Li ^a   Dey, Sujit ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FAILURE ANALYSIS; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; MICROPROCESSOR CHIPS;

AT-SPEED TESTING; FUNCTIONAL SELF TEST METHODOLOGY; STRUCTURAL TESTING;

BUILT-IN SELF TEST;

EID: 0033750856     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (16)