Row buffer locality aware caching policies for hybrid memories

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2012, Pages 337-344

  Yoon, HanBin ^a   Meza, Justin ^a   Ausavarungnirun, Rachata ^a   Harding, Rachael A ^a,b   Mutlu, Onur ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACCESS LATENCY; CACHING POLICY; HYBRID MEMORIES; LOCALITY AWARE; MEMORY SYSTEMS; PERFORMANCE GAIN;

DISTRIBUTED COMPUTER SYSTEMS; DYNAMIC RANDOM ACCESS STORAGE; ENERGY EFFICIENCY; ENERGY UTILIZATION;

CACHE MEMORY;

EID: 84872056636     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2012.6378661     Document Type: Conference Paper

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