메뉴 건너뛰기




Volumn 33, Issue 10, 2012, Pages 1396-1398

Punchthrough-diode-based bipolar RRAM selector by Si epitaxy

Author keywords

Bipolar resistance RAM (RRAM); punchthrough; selector

Indexed keywords

BIPOLAR RESISTANCE RAM (RRAM); DESIGNABILITY; EPITAXIAL SI; ON-CURRENTS; ON/OFF CURRENT RATIO; PUNCH-THROUGH; SELECTOR; SI EPITAXY; SWITCHING SPEED;

EID: 84866935859     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2012.2209394     Document Type: Article
Times cited : (83)

References (16)
  • 1
    • 77957888957 scopus 로고    scopus 로고
    • Technology challenges for deep-nano semiconductor
    • K. Kim, "Technology challenges for deep-nano semiconductor," in Proc. IEEE IMW, 2010, pp. 1-2
    • (2010) Proc. IEEE IMW , pp. 1-2
    • Kim, K.1
  • 2
    • 77952403730 scopus 로고    scopus 로고
    • Future directions of non-volatile memory in compute applications
    • A. Fazio, "Future directions of non-volatile memory in compute applications," in Proc. IEDM, 2009, pp. 1-4
    • (2009) Proc. IEDM , pp. 1-4
    • Fazio, A.1
  • 5
    • 77957922168 scopus 로고    scopus 로고
    • Ultra-low power Al2O3-based RRAM with 1 ?A reset current
    • Y. Wu, B. Lee, and H.-S. P. Wong, "Ultra-low power Al2O3-based RRAM with 1 ?A reset current," in Proc. VLSI-TSA, 2010, pp. 136-137
    • (2010) Proc. VLSI-TSA , pp. 136-137
    • Wu, Y.1    Lee, B.2    Wong, H.-S.P.3
  • 6
    • 80053565784 scopus 로고    scopus 로고
    • Bipolar nonlinear Ni/TiO2/Ni selector for 1S1R crossbar array applications
    • Oct.
    • J. J. Huang, Y.-M. Tseng, Hsu C.-W. , and T. H. Hou, "Bipolar nonlinear Ni/TiO2/Ni selector for 1S1R crossbar array applications," IEEE Electron Device Lett. , vol. 32, no. 10, pp. 1427-1429, Oct. 2011
    • (2011) IEEE Electron Device Lett. , vol.32 , Issue.10 , pp. 1427-1429
    • Huang, J.J.1    Tseng, Y.-M.2    Hsu, C.-W.3    Hou, T.H.4
  • 10
    • 80054990782 scopus 로고    scopus 로고
    • Excellent selector characteristics of nanoscale VO2 for high-density bipolar ReRAM applications
    • Nov.
    • M. Son, J. Lee, J. Park, J. Shin, G. Choi, S. Jung,W. Lee, S. Kim, S. Park, and H. Hwang, "Excellent selector characteristics of nanoscale VO2 for high-density bipolar ReRAM applications," IEEE Electron Device Lett. , vol. 32, no. 11, pp. 1579-1581, Nov. 2011
    • (2011) IEEE Electron Device Lett. , vol.32 , Issue.11 , pp. 1579-1581
    • Son, M.1    Lee, J.2    Park, J.3    Shin, J.4    Choi, G.5    Jungw. Lee, S.6    Kim, S.7    Park, S.8    Hwang, H.9
  • 11
    • 79960928547 scopus 로고    scopus 로고
    • Bidirectional two-terminal switching device for crossbar array architecture
    • Aug.
    • Y. H. Song, S. Y. Park, J. M. Lee, H. J. Yang, and G. H. Kil, "Bidirectional two-terminal switching device for crossbar array architecture," IEEE Electron Device Lett. , vol. 32, no. 8, pp. 1023-1025, Aug. 2011
    • (2011) IEEE Electron Device Lett. , vol.32 , Issue.8 , pp. 1023-1025
    • Song, Y.H.1    Park, S.Y.2    Lee, J.M.3    Yang, H.J.4    Kil, G.H.5
  • 12
    • 70450250236 scopus 로고    scopus 로고
    • Effect of the top electrode material on the resistive switching of TiO2 thin film
    • Feb.
    • W.-G. Kim and S.-W. Rhee, "Effect of the top electrode material on the resistive switching of TiO2 thin film," Microelectron. Eng. , vol. 87, no. 2, pp. 98-103, Feb. 2010
    • (2010) Microelectron. Eng. , vol.87 , Issue.2 , pp. 98-103
    • Kim, W.-G.1    Rhee, S.-W.2
  • 14
    • 79960846879 scopus 로고    scopus 로고
    • 9 nm half-pitch functional resistive memory cell with < 1 A programming current using thermally oxidized substoichiometric WOx film
    • C. H. Ho, C.-L. Hsu, C.-C. Chen, J.-T. Liu, C.-S. Wu, C.-C. Huang, C. Hu, and F.-L. Yang, "9 nm half-pitch functional resistive memory cell with < 1?A programming current using thermally oxidized substoichiometric WOx film," in Proc. IEDM, 2010, pp. 436-439
    • (2010) Proc. IEDM , pp. 436-439
    • Ho, C.H.1    Hsu, C.-L.2    Chen, C.-C.3    Liu, J.-T.4    Wu, C.-S.5    Huang, C.-C.6    Hu, C.7    Yang, F.-L.8
  • 15
    • 0020201388 scopus 로고
    • The lateral punch-through transistor
    • Oct.
    • B. Wilamowski and R. C. Jaeger, "The lateral punch-through transistor," IEEE Electron Device Lett. , vol. EDL-3, no. 10, pp. 277-280, Oct. 1982
    • (1982) IEEE Electron Device Lett. , vol.EDL-3 , Issue.10 , pp. 277-280
    • Wilamowski, B.1    Jaeger, R.C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.