FeFET logic circuits for operating a 64 kb FeNAND flash memory array

Integrated Ferroelectrics

Volumn 132, Issue 1, 2012, Pages 114-121

  Zhang, Xizhen ^a   Takahashi, Mitsue ^a   Sakai, Shigeki ^a  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BASIC OPERATION; BIT LINES; ELECTRICAL DATA; MEMORY CELL; MEMORY CELL ARRAYS; STATISTICAL DISTRIBUTION; TEST ELEMENTS;

FERROELECTRICITY; FIELD EFFECT TRANSISTORS; FLASH MEMORY; SEMICONDUCTOR STORAGE;

LOGIC CIRCUITS;

EID: 84862095898     PISSN: 10584587     EISSN: 16078489     Source Type: Journal    
DOI: 10.1080/10584587.2012.660836     Document Type: Conference Paper

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