High performance reliable variable latency carry select addition

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2012, Pages 1257-1262

  Du, Kai ^a   Varman, Peter ^a   Mohanram, Kartik ^b  

^a Rice University   (United States)

^b PA 15260   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AREA REDUCTION; AREA REQUIREMENT; CRITICAL PATH DELAYS; DESIGN EXPLORATION; DESIGNWARE; ERROR RATE; GAUSSIANS; LOW AREA; LOW OVERHEAD; NOVEL FUNCTIONS;

DESIGN; EXHIBITIONS;

ADDERS;

EID: 84862058742     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)

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