Robust passive hardware metering

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2011, Pages 802-809

  Wei, Sheng ^a   Nahapetian, Ani ^a,b   Potkonjak, Miodrag ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b CALIFORNIA STATE UNIVERSITY   (United States)

Author keywords

gate level characterization; Passive hardware metering; usage metering

Indexed keywords

COST-EFFECTIVE APPROACH; DELETERIOUS EFFECTS; HARDWARE METERING; LARGE DESIGNS; PASSIVE HARDWARE METERING; PHYSICAL LEVEL; SUPPLY VOLTAGES; USAGE METERING;

CHARACTERIZATION; COMPUTER AIDED DESIGN; HARDWARE; THRESHOLD VOLTAGE;

COMPUTER HARDWARE;

EID: 84855802262     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2011.6105421     Document Type: Conference Paper

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