SpiNNaker: Design and implementation of a GALS multicore system-on-chip

ACM Journal on Emerging Technologies in Computing Systems

Volumn 7, Issue 4, 2011, Pages

  Plana, Luis A ^a   Clark, David ^a   Davidson, Simon ^a   Furber, Steve ^a   Garside, Jim ^a   Painkras, Eustace ^a   Pepper, Jeffrey ^a   Temple, Steve ^a   Bainbridge, John ^a  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

Asynchronous system; Computer aided design; Globally asynchronous locallysynchronous system; Intellectual property; Network on chip

Indexed keywords

ASYNCHRONOUS CIRCUITS; ASYNCHRONOUS SYSTEM; CAD TOOL; COMPUTER AIDED DESIGN TOOLS; FULLY OPERATIONAL; GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS; GLOBALLY-ASYNCHRONOUS LOCALLYSYNCHRONOUS SYSTEM; IMPLEMENTATION METHODOLOGY; LARGE SIZES; MULTI CORE; NETWORK ON CHIP; ON-CHIP NETWORKS; STRINGENT REQUIREMENT; SYSTEM ON CHIPS; SYSTEMS ON CHIPS; TEST CHIPS; TIMING ASSUMPTIONS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ASYNCHRONOUS SEQUENTIAL LOGIC; INTELLECTUAL PROPERTY; MICROPROCESSOR CHIPS; PROGRAMMABLE LOGIC CONTROLLERS; VLSI CIRCUITS;

COMPUTER AIDED DESIGN;

EID: 84855219116     PISSN: 15504832     EISSN: 15504840     Source Type: Journal    
DOI: 10.1145/2043643.2043647     Document Type: Article

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