Helmet: A resistance drift resilient architecture for multi-level cell phase change memory system

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2011, Pages 197-208

  Zhang, Wangyuan ^a   Li, Tao ^a  

^a University of Florida   (United States)

Author keywords

computer architecture; multi level cell; phase change memory; reliability; resistance drifting

Indexed keywords

CONVENTIONAL DESIGN; DISK CACHE; ELECTRICAL RESISTANCES; ERROR RATE; FUTURE MEMORY; HIGH-DENSITY; LIFETIME REDUCTION; LOW POWER; MULTILEVEL CELL; MULTILEVEL PROGRAMMING; PCM SYSTEMS; PHASE CHANGE; POWER OVERHEAD; POWER SAVINGS; SIMULATION RESULT;

CACHE MEMORY; COST REDUCTION; DURABILITY; GERMANIUM; MEMORY ARCHITECTURE; NETWORK ARCHITECTURE; RELIABILITY;

PHASE CHANGE MEMORY;

EID: 80051949504     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2011.5958219     Document Type: Conference Paper

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