Morphable memory system: A robust architecture for exploiting multi-level phase change memories

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2010, Pages 153-162

  Qureshi, Moinuddin K ^a   Franceschini, Michele M ^a   Lastras Montaño, Luis A ^a   Karidis, John P ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

Memory monitor; Morphable memory; Multi level cell; Phase change memory

Indexed keywords

HIGH DENSITY; LOW LATENCY; LOW MEMORY; MAIN MEMORY; MEMORY CAPACITY; MEMORY MONITOR; MEMORY REQUIREMENTS; MEMORY SYSTEMS; MLC OPERATION; MULTI-LEVEL; MULTILEVEL CELL; MULTIPLE BITS; PERFORMANCE DEGRADATION; POWER EFFICIENT; RUNTIME MONITORS;

COMPUTER ARCHITECTURE; COMPUTERS; SEMICONDUCTOR STORAGE;

PHASE CHANGE MEMORY;

EID: 77954972235     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1815961.1815981     Document Type: Conference Paper

References (25)

1. International Technology Roadmap for Semiconductors, ITRS 2008 Update. http://www.itrs.net/Links/2008ITRS/Home2008.htm.
2. B. Abali et al. Hardware compressed main memory: Operating system support and performance evaluation. IEEE Trans. Comput., 50(11):1219-1233, 2001.
3. Analog Devices Inc. Data Conversion Handbook.
4. F. Bedeschi et al. A bipolar-selected phase change memory featuring multi-level cell storage. IEEE Journal of Solid-State Circuits, 44(1):217-227, 2009.
5. T. Cho et al. A dual-mode NAND flash memory: 1-Gb multilevel and high-performance 512-Mb single-level modes. IEEE Journal of Solid-State Circuits, 36(11), 2001.
6. L. Kevin et al. Disaggregated memory for expansion and sharing in blade servers. In ISCA-36, pages 267-278, 2009.
7. T. Kgil, D. Roberts, and T. Mudge. Improving nand flash based disk caches. In ISCA-35, 2008.
8. B. Lee et al. Architecting Phase Change Memory as a Scalable DRAM Alternative. In ISCA-36, 2009.
9. S. Lee et al. FlexFS: A Flexible Flash File System for MLC NAND Flash Memory. In USENIX '09, 2009.
10. J. Lin et al. Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems. In HPCA-14, 2008.
11. K. Luo et al. Balancing throughput and fairness in SMT processors. In ISPASS-2001.
12. R. L. Mattson et al. Evaluation techniques in storage hierarchies. IBM Journal of Research and Development, 9(2):78-117, 1970.
13. T. Nirschl et al. Write strategies for 2 and 4-bit multi-level phase-change memory. In Proceedings of the IEEE International Electron Devices Meeting, 2007.
14. M. Qureshi et al. Scalable high performance main memory system using phase-change memory technology. In ISCA-36, 2009.
15. M. K. Qureshi et al. Improving read performance of phase change memories via write cancellation and write pausing. In HPCA-16, 2010.
16. M. K. Qureshi and Y. N. Patt. Utility-based cache partitioning: A low-overhead, high-performance, runtime mechanism to partition shared caches. In MICRO-39, 2006.
17. S. Raoux et al. Phase-change random access memory: A scalable technology. IBM Journal of R. and D., 52(4/5):465-479, 2008.
18. B. Razavi. Principles of data conversion system design. Wiley-IEEE Press., New York, 1995.
19. A. Snavely, D. M. Tullsen, and G. Voelker. Symbiotic jobscheduling with priorities for a simultaneous multithreading processor. In SIGMETRICS-2002.
20. The Standard Performance Evaluation Corporation. Requirements of SPEC CPU 2006. http://www.spec.org/cpu2006/Docs/systemrequirements.html.
21. G. E. Suh et al. A new memory monitoring scheme for memory-aware scheduling and partitioning. In HPCA-8, 2002.
22. J. Thatcher et al. Nand flash solid state storage for the enterprise: An in-depth look at reliability. Solid State Storage Initiative (SNIA), 2009.
23. C. A. Waldspurger. Memory resource management in VMware ESX server. SIGOPS Oper. Syst. Rev., 36(SI):181-194, 2002.
24. P. Zhou et al. Dynamic tracking of page miss ratio curve for memory management. In ASPLOS-XI, 2004.
25. P. Zhou, B. Zhao, J. Yang, and Y. Zhang. A durable and energy efficient main memory using phase change memory technology. In ISCA-36, 2009.