A study of SnAgCu solder paste transfer efficiency and effects of optimal reflow profile on solder deposits

Microelectronic Engineering

Volumn 88, Issue 7, 2011, Pages 1610-1617

  Amalu, E H ^a   Lau, W K ^b   Ekere, N N ^a   Bhatti, R S ^a   Mallik, S ^a   Otiaba, K C ^a   Takyi, G ^c  

^a UNIVERSITY OF GREENWICH   (United Kingdom)

^b CITY UNIVERSITY OF HONG KONG   (Hong Kong)

^c KWAME NKRUMAH UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Ghana)

Author keywords

Pb free solder; Reflow profile; Solder deposit; Stencil printing; Surface mount packages; Transfer efficiency

Indexed keywords

PB FREE SOLDERS; REFLOW PROFILE; SOLDER DEPOSITS; STENCIL PRINTING; SURFACE MOUNT PACKAGES; TRANSFER EFFICIENCY;

ASSEMBLY; BALL GRID ARRAYS; CHIP SCALE PACKAGES; DEPOSITS; EFFICIENCY; FLIP CHIP DEVICES; LEAD; LEAD DEPOSITS; MATHEMATICAL MODELS; MOUNTINGS; OPTIMIZATION; PRINTED CIRCUIT BOARDS; PRINTED CIRCUIT MANUFACTURE; PRINTING; SOLDERING ALLOYS; SURFACE DEFECTS; SURFACE MOUNT TECHNOLOGY;

SOLDERING;

EID: 79958030341     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2011.02.104     Document Type: Article

References (29)

1. E.H. Amalu, N.N. Ekere, R.S. Bhatti and G. Tarkyi, Investigation of effects of reflow profile parameters on lead-free solder bump volumes and joint integrity, in: AIP Conference Proceedings. Accepted for presentation at the International Conference on Advances in Materials and Processing Technologies (AMPT 2010), vol. 1315, 2011, pp. 639-644.
2. S. Aravamudhan, D. Santos, G. Pham-Van Diep and F. Andres, A Study of Solder Paste Release from Small Stencil Apertures of Different Geometries with Constant Volumes, in: Proc IEEE transaction on Technology Symposium: International Electronics Manufacturing Technology (IEMT) Symposium, SEMICON West, 2002, pp. 159-165. (Pubitemid 35186380)
3. Weidmuller, (2002), Application Information, available @ www.weidmueller.com.
4. A. Pietrikova, L. Livovsky, J. Urbancik, and R. Bucko Optimisation of Lead Free Solders Reflow Profile 2006 ISSE St. Marienthal Germany
5. D. Manessis, R. Patzelt, A. Ostmann, R. Aschenbrenner, and H. Reichl Microelectronics Reliab. 44 2004 797 803
6. A.D. Jones, Optimizing Solder Paste Rheology to Satisfy the Fast Print Process, Multicore Solder, Inc.
7. T.A. Nguty, N. N. Ekere and A. Adebayo, Correlating Solder Paste Composition with Stencil Printing Performance, in: Proc IEEE/CPMT international Manufacturing Technology Symposium, (1999), 304-309.
8. S. Mallik, J. Thieme, R. Bauer, N. N. Ekere, A. Seman, R. Bhatti and R. Durairaj, Study of the Rheological behaviours of Sn-Ag-Cu Solder Paste and their Correlation with Printing Performance, in: Proc 11th Electronics Packaging Technology Conference, Singapore, December (2009), 869-873.
9. G.J. Jackson, R.Durairaj and N.N. Ekere, Characterisation of Lead-Free Pastes for Low Cost Flip-Chip Bumping, in Proc SEMI International Electronics Manufacturing Technology (IEMT) Symposium, (2002) 223-228. (Pubitemid 35186390)
10. T. Okuru, M. Kanai, S. Ogata, T. Takei and H. Takakusagi, "Optimization of Solder Paste Printability with Laser Inspection Technique, in Proc IEEE/CPMT international Electronics Manufacturing Technology Symposium (1993) pp157-16.
11. A. Schubert, R. Dudek, R. Leutenbauer, R. Doring, J. Kloeser, H. Oppermann, B. Michel, H. Reichl, D.F. Baldwin, J. Qu, S.K. Sitaraman, M. Swaminathan, C.P. Wong, and Rao Tummala IEEE Transaction on Electronics Packaging Manufacturing 22 4 1999 255 263
12. J. Pan, G.L. Tonkay, R.H. Storer, R.M. Sallade, and D.J. Leandri IEEE Transactions on Electronics Packaging Manufacturing 27 2 2004 125 132
13. E.K. Lo, N.N. Ekere, S. H. Mannan and I. Ismail, The Future of Solder Paste Printing for SMT Reflow Soldering, in: Proc BABS Autumn Conference, The Joining Environment (1992) pp. 22-25.
14. N.N. Ekere, and E.K. Lo Journal of Electronics Manufacturing 1 1991 29 40
15. L. Haslehurst, and N.N. Ekere Journal of Electronics Manufacturing 6 4 1996 307 316
16. S. Mallik, Study of the Time-dependent Rheological Behavior of Lead-free Solder Pastes and Flux Mediums used for Flip-Chip Assembly Applications, A thesis submitted in partial fulfilment of the requirements of the University of Greenwich for the Degree of Doctor of Philosophy (2009).
17. C.H. Mangin Circuit Assembly 1991 63 64
18. V.G. Kolli, F. Gadala-Maria, and R. Anderson IEEE Transactions on Components, Packaging and Manufacturing Technology 20 4 1997 416 423
19. R. Durairaj, N.N. Ekere, and B. Salam Journal of Materials Science. Materials in Electronics 15 2004 677 683
20. R. Durairaj, T.A. Nguty, and N.N. Ekere Soldering and Surface Mount Technology 13 2 2001 30 34
21. W. Yang, L.E. Felton, and R.W. Messler Journal of Electronic Materials 24 10 1995 1465 1472
22. N.C. Lee Soldering & Surface Mount Technology 11 1 1999 13 20
23. T. Skidmore, and K. Waiters Circuits Assembly 2000 17 22
24. D. Suraski, The benefits of a Ramp-to-Spike Reflow Profile, SMT magazine, April (2000), pp. 64-66.
25. H. Suganuna and A. Tamanaha, Reflow Technology, SMT magazine, issue: February (2001), pp.65-70.
26. B. Salam, C. Virseda, H. Da, N.N. Ekere, and R. Durairaj Soldering & Surface Mount Technology 1 1 2004 27 34
27. B. Salam, A study of intermetallic Compounds Formation and Growth in Sn-Ag-Cu Lead-free Solder Joints, a thesis submitted in Partial fulfilment of the requirements of the University of Greenwich for the Degree of Doctor of Philosophy (2005).
28. R. B. Sidharth, and D. Natekar, Solder Joint Shape and Standoff Height Prediction and Integration with FEA-Based Methodology, in: Proc 52nd Electronic Components and Technology Conference, San Diego CA, 28-31 May (2002), pp.1739-1744. (Pubitemid 34692191)
29. B. Salam, N. N. Ekere, and D. Rajkumar, Study of the Interface Microstructure of Sn-Ag-Cu Lead-Free Solders and the Effect of Solder Volume on Intermetallic Layer Formation, in: Proc 51st Electronic Components and Technology Conference, Orlando, FL, USA, 7th August (2002), pp. 471-477. (Pubitemid 32883430)