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Volumn 22, Issue 4, 1999, Pages 255-263

Do chip size limits exist for DCA?

Author keywords

[No Author keywords available]

Indexed keywords

CREEP; ELECTRIC CONTACTS; ENCAPSULATION; FLIP CHIP DEVICES; PRINTED CIRCUIT BOARDS; SEMICONDUCTOR DEVICE STRUCTURES; SOLDERED JOINTS; STRAIN; SUBSTRATES; THERMAL EXPANSION;

EID: 0033320161     PISSN: 1521334X     EISSN: None     Source Type: Journal    
DOI: 10.1109/6104.816091     Document Type: Article
Times cited : (8)

References (15)
  • 1
    • 0041643620 scopus 로고    scopus 로고
    • Effect of material and design parameters on the stresses induced in a Direct-Chip-Attach package during underfill cure
    • Mauna Lani, HI, June 15-19
    • K. Ramakrishna and Z. Johnson, "Effect of material and design parameters on the stresses induced in a Direct-Chip-Attach package during underfill cure," in Proc. InterPack '97, Mauna Lani, HI, June 15-19, 1997, pp. 1639-1646.
    • (1997) Proc. InterPack '97 , pp. 1639-1646
    • Ramakrishna, K.1    Johnson, Z.2
  • 2
    • 0008603689 scopus 로고    scopus 로고
    • Coffin-Manson based fatigue analysis of underfilled DCA
    • Mauna Lani, HI, June 15-19
    • V. Gektin, A. Bar-Cohen, and S. Witzman, "Coffin-Manson based fatigue analysis of underfilled DCA," in Proc. InterPack '97, Mauna Lani, HI, June 15-19, 1997, pp. 1655-1661.
    • (1997) Proc. InterPack '97 , pp. 1655-1661
    • Gektin, V.1    Bar-Cohen, A.2    Witzman, S.3
  • 3
    • 0032231094 scopus 로고    scopus 로고
    • Reliability investigations of flip chip interconnects in FCOB and FCOG applications by FEA
    • Singapore, Dec. 8-10
    • A. Schubert, R. Dudek, and R. Döring, "Reliability investigations of flip chip interconnects in FCOB and FCOG applications by FEA," in Proc. 2nd Electron. Packag. Technol. Conf., Singapore, Dec. 8-10, 1998, pp. 49-56.
    • (1998) Proc. 2nd Electron. Packag. Technol. Conf. , pp. 49-56
    • Schubert, A.1    Dudek, R.2    Döring, R.3
  • 6
    • 85037134766 scopus 로고    scopus 로고
    • Low cost bumping by stencil printing: Process qualification for 200 μm pitch
    • San Diego, CA
    • J. Kloeser et al., "Low cost bumping by stencil printing: Process qualification for 200 μm pitch," in Proc. IMAPS Conf., San Diego, CA, 1998.
    • (1998) Proc. IMAPS Conf.
    • Kloeser, J.1
  • 8
    • 0004989155 scopus 로고    scopus 로고
    • Solder flip chips employing electroless nickel: An evaluation of reliability and cost
    • F. Stepniak, "Solder flip chips employing electroless nickel: an evaluation of reliability and cost," Adv. Electron. Packag., vol. 1, 1997.
    • (1997) Adv. Electron. Packag. , vol.1
    • Stepniak, F.1
  • 10
    • 0004413996 scopus 로고    scopus 로고
    • Materials mechanics and mechanical reliability of flip chip assemblies on organic substrates
    • July/Aug.
    • A. Schubert, R. Dudek, D. Vogel, B. Michel, and H. Reichl, "Materials mechanics and mechanical reliability of flip chip assemblies on organic substrates," Adv. Microelectron., vol. 24, no. 4, pp. 29-32, July/Aug. 1997.
    • (1997) Adv. Microelectron. , vol.24 , Issue.4 , pp. 29-32
    • Schubert, A.1    Dudek, R.2    Vogel, D.3    Michel, B.4    Reichl, H.5
  • 11
    • 0030678362 scopus 로고    scopus 로고
    • An efficient approach to predict solder fatigue life and its application to SM- And area array components
    • San Jose, CA, May
    • R. Dudek, M. Nylen, A. Schubert, B. Michel, and H. Reichl, "An efficient approach to predict solder fatigue life and its application to SM- and area array components," in Proc. ECTC'47, San Jose, CA, May 1997, pp. 462-471.
    • (1997) Proc. ECTC'47 , pp. 462-471
    • Dudek, R.1    Nylen, M.2    Schubert, A.3    Michel, B.4    Reichl, H.5
  • 12
    • 0042913844 scopus 로고    scopus 로고
    • Thermo-mechanical reliability analysis of flip chip assemblies by combined microDAC and the finite element method
    • Mauna Lani, HI, June 15-19
    • A. Schubert, R. Dudek, J. Auersperg, D. Vogel, B. Michel, and H. Reichl, "Thermo-mechanical reliability analysis of flip chip assemblies by combined microDAC and the finite element method," in Proc. InterPack '97, Mauna Lani, HI, June 15-19, 1997, pp. 1647-1654.
    • (1997) Proc. InterPack '97 , pp. 1647-1654
    • Schubert, A.1    Dudek, R.2    Auersperg, J.3    Vogel, D.4    Michel, B.5    Reichl, H.6
  • 14
    • 0032230571 scopus 로고    scopus 로고
    • Parametric finite element Analysis of solder joint reliability of flip chip on board
    • Singapore, Dec. 8-10
    • T. J. Goh, "Parametric finite element Analysis of solder joint reliability of flip chip on board," in Proc. 2nd Electron. Packag. Technol. Conf., Singapore, Dec. 8-10, 1998, pp. 57-62.
    • (1998) Proc. 2nd Electron. Packag. Technol. Conf. , pp. 57-62
    • Goh, T.J.1
  • 15
    • 0344926130 scopus 로고    scopus 로고
    • Role of underfilling imperfections on flip-chip reliability
    • Mauna Lani, HI, June 15-19
    • St. Michaelides and S. Sitaraman, "Role of underfilling imperfections on flip-chip reliability," in Proc. InterPack '97, Mauna Lani, HI, June 15-19, 1997, pp. 1487-1493.
    • (1997) Proc. InterPack '97 , pp. 1487-1493
    • Michaelides, St.1    Sitaraman, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.