Si passivation for Ge pMOSFETs: Impact of Si cap growth conditions

Solid-State Electronics

Volumn 60, Issue 1, 2011, Pages 116-121

  Vincent, B ^a   Loo, R ^a   Vandervorst, W ^a,b   Delmotte, J ^a   Douhard, B ^a   Valev, V K ^c   Vanbel, M ^c   Verbiest, T ^c   Rip, J ^a   Brijs, B ^a   Conard, T ^a   Claypool, C ^d   Takeuchi, S ^e   Zaima, S ^e   Mitard, J ^a   De Jaeger, B ^a   Dekoster, J ^a   Caymax, M ^a  

^a IMEC   (Belgium)

^b KU LEUVEN   (Belgium)

^c UNIVERSITY OF LEUVEN   (Belgium)

^d Scientific Computing International   (United States)

^e NAGOYA UNIVERSITY   (Japan)

Author keywords

Germanium MOSFET; Germanium passivation; Low temperature CVD; Si precursors; Trisilane; Ultrathin Si growth on germanium

Indexed keywords

GERMANIUM MOSFET; LOW TEMPERATURE CVD; SI PRECURSORS; TRISILANES; ULTRA-THIN;

CHEMICAL VAPOR DEPOSITION; FIELD EFFECT TRANSISTORS; GERMANIUM; METALLIC COMPOUNDS; MONOLAYERS; MOS DEVICES; MOSFET DEVICES; PASSIVATION; POINT DEFECTS; PRESSURE EFFECTS; SEMICONDUCTING SILICON; SEMICONDUCTOR GROWTH;

SEMICONDUCTING SILICON COMPOUNDS;

EID: 79955525133     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2011.01.049     Document Type: Article

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