SCOPUS 정보 검색 플랫폼

Volumn 156, Issue 12, 2009, Pages

The influence of the epitaxial growth process parameters on layer characteristics and device performance in si-passivated Ge pMOSFETs

(9) Caymax, Matty a Leys, Frederik a Mitard, J́rôme a Martens, Koen a Yang, Lijun a,b Pourtois, Geoffrey a Vandervorst, Wilfried a,c Meuris, Marc a Loo, Roger a

a IMEC (Belgium)

b UNIVERSITY OF LEUVEN (Belgium)

c KU LEUVEN (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

COMPLEMENTARY METAL OXIDE SEMICONDUCTORS; DEPOSITION PROCESS; DEPOSITION TEMPERATURES; DEVICE PERFORMANCE; EPITAXIAL SI; GATE STACKS; GE SURFACES; INTERFACIAL TRAPS; METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR; P-MOSFETS; PMOSFET; SI LAYER;

DIELECTRIC DEVICES; EPITAXIAL GROWTH; FIELD EFFECT TRANSISTORS; GERMANIUM; HAFNIUM COMPOUNDS; HOLE MOBILITY; LOGIC GATES; MOSFET DEVICES; PASSIVATION; SEMICONDUCTING GERMANIUM; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR GROWTH; SURFACE SEGREGATION;

SEMICONDUCTING SILICON;

EID: 70350728573 PISSN: 00134651 EISSN: None Source Type: Journal
DOI: 10.1149/1.3240880 Document Type: Article

Times cited : (49)

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