The ISPD-2011 routability-driven placement contest and benchmark suite

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2011, Pages 141-146

  Viswanathan, Natarajan ^a   Alpert, Charles J ^a   Sze, Cliff ^a   Li, Zhuo ^a   Nam, Gi Joon ^a   Roy, Jarrod A ^a  

^a IBM   (United States)

Author keywords

benchmarks; physical design; placement

Indexed keywords

ASIC DESIGN; BENCHMARK SUITES; BENCHMARKS; GLOBAL ROUTING; PHYSICAL DESIGN; PLACEMENT; PLACEMENT ALGORITHM; ROUTABILITY; TEST CASE; WIRE LENGTH;

ALGORITHMS; DESIGN; INTEGRATED CIRCUITS; WIRE;

AVAILABILITY;

EID: 79955066226     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1960397.1960429     Document Type: Conference Paper

References (27)

1. C. J. Alpert, S. Karandikar, Z. Li, G.-J. Nam, S. T. Quay, H. Ren, C. N. Sze, P. G. Villarrubia, and M. Yildiz. Techniques for fast physical synthesis. Proceedings of IEEE, 95(3):573-599, Mar. 2007.
2. C. J. Alpert, Z. Li, M. D. Moffitt, G.-J. Nam, J. A. Roy, and G. Telleze. What makes a design difficult to route. In Proc. Intl. Symp. on Physical Design, pages 7-12, 2010.
3. A. E. Caldwell, A. B. Kahng, and I. L. Markov. Placement formats, rev. 1.2. In http://vlsicad.ucsd.edu/GSRC/bookshelf/Slots/Placement/plFormats.html.
4. A. E. Caldwell, A. B. Kahng, and I. L. Markov. Toward CAD-IP reuse: The MARCO GSRC Bookshelf of fundamental CAD algorithms. In IEEE Design and Test, pages 72-81, 2002.
5. T. Chan, J. Cong, and K. Sze. Multilevel generalized force-directed method for circuit placement. In Proc. Intl. Symp. on Physical Design, pages 185-192, 2005.
6. T. F. Chan, J. Cong, J. R. Shinnerl, K. Sze, and M. Xie. mPL6: Enhanced multilevel mixed-size placement. In Proc. Intl. Symp. on Physical Design, pages 212-214, 2006.
7. Y.-J. Chang, Y.-T. Lee, and T.-C. Wang. NTHU-Route 2.0: A fast and stable global router. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 338-343, 2008.
8. T.-C. Chen, Z.-W. Jiang, T.-C. Hsu, H.-C. Chen, and Y.-W. Chang. A high-quality mixed-size analytical placer considering preplaced blocks and density constraints. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 187-192, 2006.
9. M. Cho and D. Z. Pan. Boxrouter: A new global router based on box expansion and progressive ilp. In Proc. ACM/IEEE Design Automation Conf., pages 373-378, 2006.
10. J. Hu, J. A. Roy, and I. L. Markov. Completing high-quality routes. In Proc. Intl. Symp. on Physical Design, pages 35-41, 2010.
11. A. B. Kahng, S. Reda, and Q. Wang. Architecture and details of a high quality, large-scale analytical placer. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 890-897, 2005.
12. M.-C. Kim, D.-J. Lee, and I. L. Markov. SimPL: An effective placement algorithm. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 649-656, 2010.
13. T.-H. Lee and T.-C. Wang. Robust layer assignment for via optimization in multi-layer global routing. In Proc. Intl. Symp. on Physical Design, pages 159-166, 2009.
14. Z. Li and C. J. Alpert. What is physical synthesis. ACM/SIGDA E-Newsletter, 40(12), Dec.
15. K. Y. D. Z. P. M. Cho, K. Lu. Boxrouter 2.0: Architecture and implementation of a hybrid and robust global router. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 503-508, 2007.
16. G.-J. Nam, C. J. Alpert, and P. Villarrubia. ISPD 2006 placement contest: Benchmark suite and results. In Proc. Intl. Symp. on Physical Design, pages 167-167, 2006.
17. G.-J. Nam, C. J. Alpert, P. Villarrubia, B. Winter, and M. Yildiz. The ISPD2005 placement contest and benchmark suite. In Proc. Intl. Symp. on Physical Design, pages 216-220, 2005.
18. J. A. Roy and I. L. Markov. High-performance routing at the nanometer scale. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 496-502, 2007.
19. J. A. Roy, N. Viswanathan, G.-J. Nam, C. J. Alpert, and I. L. Markov. CRISP: Congestion reduction by iterated spreading during placement. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 357-362, 2009.
20. P. Spindler and F. M. Johannes. Fast and robust quadratic placement combined with an exact linear net model. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 179-186, 2006.
21. N. Viswanathan, G.-J. Nam, C. J. Alpert, P. Villarubia, H. Ren, and C. Chu. RQL: Global placement via relaxed quadratic spreading and linearization. In Proc. ACM/IEEE Design Automation Conf., pages 453-458, 2007.
22. N. Viswanathan, M. Pan, and C. Chu. Fastplace 3.0: A fast multilevel quadratic placement algorithm with placement congestion control. In Proc. Asia and South Pacific Design Automation Conf., pages 135-140, 2007.
23. T.-H. Wu, A. Davoodi, and J. T. Linderoth. GRIP: scalable 3D global routing using integer programming. In Proc. ACM/IEEE Design Automation Conf., pages 320-325, 2009.
24. T.-H. Wu, A. Davoodi, and J. T. Linderoth. A parallel integer programming approach to global routing. In Proc. ACM/IEEE Design Automation Conf., pages 194-199, 2010.
25. Y. Xu, Y. Zhang, and C. Chu. Fastroute 4.0: Global router with efficient via minimization. In Proc. Asia and South Pacific Design Automation Conf., pages 576-581, 2009.
26. Y. Zhang and C. Chu. CROP: Fast and effective congestion refinement of placement. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 344-350, 2009.
27. Y. Zhang, Y. Xu, and C. Chu. FastRoute 3.0: A fast and high quality global router based on virtual capacity. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pages 344-349, 2008.