Development and evaluation of 3-D SiP with vertically interconnected Through Silicon Vias (TSV)

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2007, Pages 847-852

  Jang, Dong Min ^a   Ryu, Chunghyun ^a   Lee, Kwang Yong ^b   Cho, Byeong Hoon ^a   Kim, Joungho ^a   Oh, Tae Sung ^b   Lee, Won Jong ^a   Yu, Jin ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^b Hong Ik University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING; INTERCONNECTION NETWORKS; REACTIVE ION ETCHING; THREE DIMENSIONAL COMPUTER GRAPHICS;

3-D SYSTEM; IONIZED METAL PLASMA (IMP);

MICROELECTRONICS;

EID: 35348919396     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2007.373897     Document Type: Conference Paper

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