Composable dynamic voltage and frequency scaling and power management for dataflow applications

Proceedings - 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010

Volumn , Issue , 2010, Pages 107-114

  Goossens, Kees ^a   She, Dongrui ^a   Milutinovic, Aleksandar ^b   Molnos, Anca ^c  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b UNIVERSITY OF TWENTE   (Netherlands)

^c DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

COMPOSABILITY; DATAFLOW; DYNAMIC VOLTAGE AND FREQUENCY SCALING; ENERGY SAVING; FPGA IMPLEMENTATIONS; LOCAL MEMORIES; MULTIPLE PROCESSORS; NETWORK ON CHIP; OFF-CHIP; ON CHIPS; OTHER APPLICATIONS; POWER GATINGS; POWER MANAGEMENTS; REAL TIME OPERATING SYSTEM; REAL TIME REQUIREMENT; SHARED MEMORIES; TEMPORAL BEHAVIOUR; WORST-CASE EXECUTION TIME;

COMPUTER OPERATING SYSTEMS; DESIGN; ENERGY MANAGEMENT; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MICROPROCESSOR CHIPS; NETWORK ARCHITECTURE; SYSTEMS ANALYSIS;

MANAGEMENT;

EID: 78649846461     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2010.61     Document Type: Conference Paper

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