메뉴 건너뛰기




Volumn , Issue , 2010, Pages 306-311

The aethereal network on chip after ten years: Goals, evolution, lessons, and future

Author keywords

Circuit switching; Network on chip; Rate control

Indexed keywords

CIRCUIT SWITCHING; COST ANALYSIS; FUTURE DIRECTIONS; NETWORK ON CHIP; RATE CONTROLS;

EID: 77956202439     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1837274.1837353     Document Type: Conference Paper
Times cited : (150)

References (16)
  • 1
    • 74549202663 scopus 로고    scopus 로고
    • Composable resource sharing based on latency-rate servers
    • B. Akesson, et al. Composable resource sharing based on latency-rate servers. In DSD, 2009.
    • (2009) DSD
    • Akesson, B.1
  • 2
    • 77956216821 scopus 로고    scopus 로고
    • Scheduling discipline for latency and bandwidth guarantees in asynchronous NOC
    • T. Bjerregaard, et al. Scheduling discipline for latency and bandwidth guarantees in asynchronous NOC. In ASYNC, 2005.
    • (2005) ASYNC
    • Bjerregaard, T.1
  • 3
    • 77956197406 scopus 로고    scopus 로고
    • NOCs in emerging interconnect paradigms: Advantages and challenges
    • L. P. Carloni, et al. NOCs in emerging interconnect paradigms: Advantages and challenges. In NOCS, 2009.
    • (2009) NOCS
    • Carloni, L.P.1
  • 5
    • 11844302406 scopus 로고    scopus 로고
    • Interconnect and memory organization in SOCs for advanced set-top boxes and TV
    • Kluwer
    • K. Goossens, et al. Interconnect and memory organization in SOCs for advanced set-top boxes and TV. In Interconnect Centric Design for Advanced SoC and NoC. Kluwer, 2004.
    • (2004) Interconnect Centric Design for Advanced SoC and NoC
    • Goossens, K.1
  • 6
    • 60349104720 scopus 로고    scopus 로고
    • CoMPSoC: A template for composable and predictable multi-processor system on chips
    • A. Hansson, et al. CoMPSoC: A template for composable and predictable multi-processor system on chips. TODAES, 2009.
    • (2009) TODAES
    • Hansson, A.1
  • 7
    • 34250831093 scopus 로고    scopus 로고
    • Avoiding message-dependent deadlock in network-based systems on chip
    • May, Hindawi
    • A. Hansson, et al. Avoiding message-dependent deadlock in network-based systems on chip. VLSI Design, May 2007. Hindawi
    • (2007) VLSI Design
    • Hansson, A.1
  • 8
    • 70350053280 scopus 로고    scopus 로고
    • Aelite: A flit-synchronous network on chip with composable and predictable services
    • A. Hansson, et al. aelite: A flit-synchronous network on chip with composable and predictable services. In DATE, 2009.
    • (2009) DATE
    • Hansson, A.1
  • 10
    • 3042740415 scopus 로고    scopus 로고
    • Guaranteed bandwidth using looped containers in temporally disjoint networks within the Nostrum network on chip
    • M. Millberg, et al. Guaranteed bandwidth using looped containers in temporally disjoint networks within the Nostrum network on chip. In DATE, 2004.
    • (2004) DATE
    • Millberg, M.1
  • 11
    • 18844419984 scopus 로고    scopus 로고
    • Task-level timing models for guaranteed performance in multiprocessor NOCs
    • P. Poplavko, et al. Task-level timing models for guaranteed performance in multiprocessor NOCs. In CASES, 2003.
    • (2003) CASES
    • Poplavko, P.1
  • 12
    • 44149114053 scopus 로고    scopus 로고
    • Debugging distributed-shared-memory communication at multiple granularities in NOCs
    • B. Vermeulen, et al. Debugging distributed-shared-memory communication at multiple granularities in NOCs. NOCS 2008.
    • (2008) NOCS
    • Vermeulen, B.1
  • 13
    • 27344447802 scopus 로고    scopus 로고
    • A quality-of-service mechanism for interconnection networks in system-on-chips
    • W.-D. Weber, et al. A quality-of-service mechanism for interconnection networks in system-on-chips. In DATE, 2005.
    • (2005) DATE
    • Weber, W.-D.1
  • 14
    • 34548314014 scopus 로고    scopus 로고
    • Design and DFT of a high-speed area-efficient embedded asynchronous FIFO
    • P. Wielage, et al. Design and DFT of a high-speed area-efficient embedded asynchronous FIFO. In DATE, 2007.
    • (2007) DATE
    • Wielage, P.1
  • 15
    • 84947211640 scopus 로고    scopus 로고
    • Socbus: Switched network on chip for hard real time embedded systems
    • D. Wiklund, et al. Socbus: switched network on chip for hard real time embedded systems. In IPDPS, 2003.
    • (2003) IPDPS
    • Wiklund, D.1
  • 16
    • 0029388337 scopus 로고
    • Service disciplines for guaranteed performance service in packet-switching networks
    • Oct.
    • H. Zhang. Service disciplines for guaranteed performance service in packet-switching networks. Proc. IEEE, Oct. 1995.
    • (1995) Proc. IEEE
    • Zhang, H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.