Improvement of threshold voltage deviation in damascene metal gate transistors

IEEE Transactions on Electron Devices

Volumn 48, Issue 8, 2001, Pages 1604-1611

  Yagishita, Atsushi ^b   Saito, Tomohiro ^b   Nakajima, Kazuaki ^b   Inumiya, Seiji ^b   Matsuo, Kouji ^a,b   Shibata, Takeshi ^b   Tsunashima, Yoshitaka ^b   Suguro, Kyoichi ^b   Arikado, Tsunetoshi ^b  

^a IEEE

^b TOSHIBA CORPORATION   (Japan)

Author keywords

Aluminum; Barrier metal; Chemical mechanical polishing (CMP); Crystal orientation; CVD; Damascene; High k gate dielectric; Metal gate; Process damage; S factor; Sputter; Ta2O5; Threshold voltage deviation; TiN; Tungsten; Work function

Indexed keywords

ALUMINUM; CHEMICAL MECHANICAL POLISHING; CHEMICAL VAPOR DEPOSITION; CRYSTAL ORIENTATION; MOSFET DEVICES; SEMICONDUCTOR INSULATOR BOUNDARIES; TANTALUM COMPOUNDS; THRESHOLD VOLTAGE; TITANIUM NITRIDE; TUNGSTEN;

BARRIER METAL; DAMASCENE METAL GATE TRANSISTORS; GATE INSULATOR; GATE OXIDE; PLASMA DAMAGES; POLYSILICON GATE TRANSISTORS; THERMAL DAMAGES;

GATES (TRANSISTOR);

EID: 0035423578     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.936569     Document Type: Article

References (14)

1. Influence of statistical spatial-nonuniformity of dopant atoms on threshold voltage in a system of many MOSFETs
2. Quantitative evaluation of gate oxide damage during plasma processing using antenna-structure capacitors
3. 1-x (x ∼ 0.3) as gate material for sub-0.25 um complementary metal oxide semiconductor applications
4. 2 gate insulator with TiN gate technology for 0.1 μm MOSFETs
5. 5 gate insulator
6. Gate oxide integrity (GOI) of MOS transistors with W/TiN Stacked gate
7. Stacked gate dielectrics with TaO for future CMOS technologies
8. Highly-reliable, low-resistivity bcc-Ta gate MOS technology using low-damage Xe-plasma sputtering and Si-encapsulated silicidation process
9. CMOS metal replacement gate transistors using tantalum pentoxide gate insulator
10. Plasma-damage-free gate process using CMP for 0.1 μm MOSFETs
11. High performance metal gate MOSFETs fabricated by CMP for 0.1 μm regime
12. Reduction of threshold voltage deviation in damascene metal gate MOSFETs
13. Work function controlled metal gate electrode on ultrathin gate insulators
14. 5 gate di-electrics for damascene metal gate transistor