Warpage mechanism analyses of strip panel type PBGA chip packaging

Microelectronics Reliability

Volumn 50, Issue 3, 2010, Pages 398-406

  Kim, Yeong K ^a   Park, In Soo ^b   Choi, Jooho ^a  

^a Hankuk Aviation University   (South Korea)

^b Doosan Co   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP PACKAGING; COOLDOWN; MATERIAL PROPERTY; MEASUREMENT DATA; MECHANISM ANALYSIS; MOLDING COMPOUND; NUMERICAL CALCULATION; PACKAGING DESIGNS; PLASTIC BALL GRID ARRAYS; RELAXATION BEHAVIORS; ROOM TEMPERATURE; SIMULATION CALCULATION; SIMULATION RESULT; SUBSTRATE MATERIAL; TEST METHOD; WARPAGES;

CHIP SCALE PACKAGES; ELECTRONIC EQUIPMENT MANUFACTURE; MACHINE DESIGN; MATERIALS PROPERTIES; MECHANICAL PROPERTIES; MOLDING; PACKAGING; SHEET MOLDING COMPOUNDS;

PACKAGING MATERIALS;

EID: 77149120125     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2009.12.010     Document Type: Article

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