Measurement and analysis of contact plug resistance variability

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2009, Pages 415-422

  Balakrishnan, Karthik ^a   Boning, Duane ^a  

^a Massachusetts Institute of Technology Cambridge   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

90NM CMOS; CIRCUIT DESIGNS; CIRCUIT PERFORMANCE; COMPACT MODEL; DEVICES UNDER TESTS; DIFFUSION REGION; LITHOGRAPHY PROCESS; MEASUREMENT AND ANALYSIS; MEASUREMENT RESULTS; POLYSILICON GATES; RANDOM VARIATION; RESISTANCE CHANGE; RESISTANCE DISTRIBUTION; SPATIAL CORRELATIONS; SPATIAL VARIATIONS; STATISTICAL ANALYSIS; TECHNOLOGY SCALING; TEST CHIPS; VARIABILITY INFORMATION;

DIES; IMPACT RESISTANCE; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUITS; LITHOGRAPHY; POLYSILICON;

ELECTRIC NETWORK ANALYSIS;

EID: 74049132306     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2009.5280812     Document Type: Conference Paper

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