Lower cost quantum gate realizations of multiple-control Toffoli gates

IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings

Volumn , Issue , 2009, Pages 308-313

  Miller, D Michael ^a  

^a UNIVERSITY OF VICTORIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CONTROLLED-NOT; ELEMENTARY GATES; IN-BETWEEN; LOWER COST; NOT GATE; QUANTUM GATES; SQUARE ROOTS; SYSTEMATIC METHOD; TOFFOLI GATES;

LOGIC GATES; SIGNAL PROCESSING;

QUANTUM ELECTRONICS;

EID: 74049126531     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACRIM.2009.5291355     Document Type: Conference Paper

References (26)

1. A. Agrawal and N. Jha. Reversible logic synthesis. In Proc. Design, Automation and Test in Europe, pages 1384-1385, 2004.
2. A. Al-Rabadi. Reversible Logic Synthesis: From Fundamentals to Quantum Computing. Springer-Verlag, 2003.
3. A. Barenco, C. Bennett, R. Cleve, D. DiVinchenzo, M. Margolus, P. Shor, T. Sleator, J. Smolin, and H. Weinfurter. Elementary gates for quantum computation. Physical Review A, 52(5):3457-3467, Nov. 1995.
4. C. Bennett. Notes on the history of reversible computation. IBM J. Research and Development, 32(1):16-23, 1988.
5. J. Donald and N. K. Jha. Reversible logic synthesis with Fredkin and Peres gates. J. Emergin Technology Computing Systems, 4(1):1-19, 2008.
6. K. Fazel, M. Thornton, and J. E. Rice. ESOP-based Toffoli gate cascade generation. In Proceedings IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM), page 206209, 2007.
7. P. Gupta, A. Agrawal, and N. K. Jha. An algorithm for synthesis of reversible logic circuits. IEEE Trans. on CAD, 25(11):2317-2330, Nov. 2006.
8. P. Kerntopf. A new heuristic algorithm for reversible logic synthesis. In Proc. Design Automation Conf., pages 834-837, 2004.
9. D. Maslov and G. Dueck. Improved quantum cost for n-bit Toffoli gates. Electronic Letters, 39(25):1790-1791, 2003. expanded version available as arXiv:quant-ph/0403053v1.
10. D. Maslov, G. Dueck, D. Miller, and C. Negrevergne. Quantum circuit simplification and level compaction. IEEE Trans. on CAD, 27(3):436-444, March 2008.
11. D. Maslov, G. W. Dueck, and D. M. Miller. Techniques for the synthesis of reversible Toffoli networks. ACM Trans. Des. Autom. Electron. Syst., 12(4):42.1-42.28, 2007.
12. D. Maslov, C. Young, D. M. Miller, and G. W. Dueck. Quantum circuit simplification using templates. In Proc. Design, Automation and Test in Europe, pages 1208-1213, 2005.
13. D. M. Miller, D. Maslov, and G. W. Dueck. A transformation based algorithm for reversible logic synthesis. In Proc. Design Automation Conf., pages 318-323, 2003.
14. D. M. Miller, R. Wille, and G. W. Dueck. Synthesizing reversible circuits from irreversible specifications using Reed-Muller spectral techniques. In Proc. Reed-Muller Workshop, pages 87-96, May 2009.
15. M. Mohammadi and M. Eshghi. Heuristic methods to use don't-cares in automated design of reversible and quantum logic circuits. Quantum Information Processing, 7:175-192, 2008.
16. M. Nielsen and I. Chuang. Quantum Computation and Quantum Information. Cambridge Univ. Press, 2000.
17. A. Peres. Reversible logic and quantum computers. Physical Review A, 32:3266-3276, 1985.
18. M. Saeedi, M. Sedighi, and M. S. Zamani. A novel synthesis algorithm for reversible circuits. In Proc. Int'l Conf. on CAD, pages 65-68, 2007.
19. M. Saeedi, M. S. Zamani, and M. Sedighi. Algebraic characterization of CNOT-baed quantum circuits with its application to logic synthesis. In Proc. European Conf. on Digital Systems Design, pages 339-346, 2007.
20. M. Saeedi, M. S. Zamani, and M. Sedighi. On the behavior of substitution-based reversible circuit synthesis algorithms: Investigation and improvement. In Proc. IEEE Computer Society Symp. on VLSI, pages 428-436, 2007.
21. Z. Sasanian, M. Saeedi, M. Sedighi, and M. Zamani. A cycle-based synthesis algorithm for reversible logic. In Proc. ASP Design Automation Conf., pages 745-750, 2009.
22. N. O. Scott and G. W. Dueck. Pairwise decomposition of toffoli gates in a quantum circuit. In Proc. Great Lakes Symp. VLSI, pages 231-236, 2008.
23. V. V. Shende, A. K. Prasad, I. L. Markov, and J. P. Hayes. Reversible logic circuit synthesis. In Proc. Int'l Conf. on CAD, pages 125-132, 2002.
24. T. Toffoli. Reversible computing. Tech Memo LCS/TM-151, MIT Lab for Comp. Sci, 1980.
25. R. Wille, D. Große, L. Teuber, G. W. Dueck, and R. Drechsler. RevLib: An online resource for reversible functions and reversible circuits. In Int'l Symp. on MultiValued Logic, pages 220-225, 2008. RevLib is available at www.revlib.org.
26. Y. Zheng and C. Huang. A novel Toffoli network synthesis algorithm for reversible logic. In Proc. ASP Design Automation Conf., pages 739-744, 2009.