Algebraic characterization of CNOT-based quantum circuits with its applications on logic synthesis

Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007

Volumn , Issue , 2007, Pages 339-346

  Saeedi, Mehdi ^a   Zamani, Morteza Saheb ^a   Sedighi, Mehdi ^a  

^a AMIRKABIR UNIVERSITY OF TECHNOLOGY   (Iran)

Author keywords

[No Author keywords available]

Indexed keywords

LOGIC CIRCUITS; LOGIC DESIGN; NETWORKS (CIRCUITS); QUANTUM THEORY; SPECIFICATIONS; SYSTEMS ANALYSIS;

ALGEBRAIC CHARACTERIZATIONS; CMOS PROCESSES; FUNDAMENTAL LIMITS; FUTURE DESIGNS; KARNAUGH MAPS; LOGIC SYNTHESES; MATRIX ELEMENTS; MATRIX REPRESENTATIONS; QUANTUM ALGORITHMS; QUANTUM CIRCUITS; SPEED-UP;

ARCHITECTURAL DESIGN;

EID: 47749114177     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2007.4341490     Document Type: Conference Paper

References (24)

1. International Technology Roadmap for Semiconductors, 2005 Edition.
2. P. E. Black, D. R. Kuhn, and C. J. Williams, "Quantum Computing and Communication," Advances in Computers, Academic Press, vol. 56, pp. 189-244, 2002.
3. L. K. Grover, "A Fast Quantum Mechanical Algorithm for Database Search," in 28th Annual ACM Symposium on Theory of Computing, pp. 212-219, 1996.
4. P. W. Shor, "Polynomial Time Algorithms for Prime Factorization and Discrete Logarithms on a Quantum Computer," SIAM Journal on Computing, 26(5), pp. 1484-1509, 1997.
5. M. A. Nielsen, I. L. Chuang, "Quantum Computation and Quantum Information," Cambridge University Press, 2000.
6. T. Sasao, "Logic Synthesis and Optimization," Kluwer Academic Publishers, 1993.
7. T. Toffoli, "Reversible Computing," MIT, Tech. Rep., 1980.
8. K. Iwama, and Y. Kambayashi, and S. Yamashita, "Transformation Rules for Designing CNOT-Based Quantum Circuits," Design Automation Conference, pp.419-424, 2002.
9. D. Maslov, C. Young, D. M. Miller, and G. W. Dueck, "Quantum Circuit Simplification Using Templates," Design Automation and Test in Europe, pp. 1208-1213, 2005.
10. D. M. Miller, D. Maslov, and G. W. Dueck, "A Transformation Based Algorithm for Reversible Logic Synthesis," Design Automation Conference, pp. 318-323, 2003.
11. D. M. Miller, "Spectral and Two-Place Decomposition Techniques in Reversible Logic," 45th Midwest Symposium on Circuits and Systems, pp. II-493-II-496, 2002.
12. P. Kerntopf, "A New Heuristic Algorithm for Reversible Logic Synthesis," Design Automation Conference, pp. 834-837, 2004.
13. V. V. Shende , A. K. Prasad, I. L. Markov, and J. P. Hayes, "Synthesis of Reversible Logic Circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22(6), pp. 710-722, 2003.
14. M. Saeedi, M. Saheb Zamani, M. Sedighi, "On the Behavior of Substitution-Based Reversible Circuit Synthesis Algorithms: Investigation and Improvement", International Symposium on VLSI, 2007.
15. W. Hung, X. Song, G. Yang, J. Yang, and M. Perkowski, "Quantum Logic Synthesis by Symbolic Reachability Analysis," Design Automation Conference, pp. 838-841, 2004.
16. V. V. Shende, S. S. Bullock, I. L. Markov, "Synthesis of Quantum Logic Circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(6), pp. 1000-1010, June 2006.
17. F. S. Khan, and M. M. Perkowski, "Synthesis of Ternary Quantum Logic Circuits by Decomposition," in Proc. of the 7th International Symposium on Representations and Methodology of Future Computing Technologies, 2005.
18. G. Cybenko, "Reducing Quantum Computations to Elementary Unitary Operations," Computing in Science and Engineering, pp. 27-32, 2001.
19. J. J. Vartiainen, M. Mottonen, and M. M. Salomaa. "Efficient Decomposition of Quantum Gates," Phys. Rev. Let., 92:177902, 2004.
20. A. Abdollahi, and M. Pedram, "Analysis and Synthesis of Quantum Circuits by Using Quantum Decision Diagrams," Design Automation and Test in Europe, pp. 317-322, 2006.
21. M. Lukac et al, "Evolutionary Approach to Quantum and Reversible Circuits Synthesis," Artificial Intelligence in Logic Design, Kluwer Academic Publisher, pp. 361-417, 2004.
22. S. S. Bullock, I. L. Markov, "An Arbitrary Two qubit Computation in 23 Elementary Gates or less," Design Automation Conference, pp. 324-329, 2003.
23. G. Yang, W. N. N. Hung, X. Song and M. Perkowski, "Exact Synthesis of 3-qubit Quantum Circuits from Non-binary Quantum Gates Using Multiple-Valued Logic and Group Theory," Design Automation and Test in Europe, pp. 434-435, 2005.
24. A. Mishchenko, and M. Perkowski, "Fast Heuristic Minimization of Exclusive Sum-Of-Products," International Workshop on Application of Reed-Muller Expansion in Circuit Design, pp. 242-250, 2001.