A cycle-based synthesis algorithm for reversible logic

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2009, Pages 745-750

  Sasanian, Zahra ^a   Saeedi, Mehdi ^a   Sedighi, Mehdi ^a   Zamani, Morteza Saheb ^a  

^a AMIRKABIR UNIVERSITY OF TECHNOLOGY   (Iran)

Author keywords

[No Author keywords available]

Indexed keywords

REVERSIBLE CIRCUITS; REVERSIBLE LOGIC; SYNTHESIS ALGORITHMS;

COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; LOGIC GATES;

ALGORITHMS;

EID: 64549140242     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2009.4796569     Document Type: Conference Paper

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