A novel toffoli network synthesis algorithm for reversible logic

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2009, Pages 739-744

  Zheng, Yexin ^a   Huang, Chao ^a  

^a Virginia Polytechnic Institute and State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHM CONVERGENCES; CIRCUIT SIZES; COMPLEXITY MEASUREMENTS; COMPUTATION TIME; DIRECTED GRAPHS; EFFICIENT SYNTHESIS; EXACT METHODS; EXACT SYNTHESIS; FUNCTION REPRESENTATIONS; HIGH QUALITIES; INPUT OUTPUTS; LOCAL MINIMUMS; LOGIC SYNTHESIS; LOSSLESS CIRCUITS; OPTIMAL SOLUTIONS; ORDERS OF MAGNITUDES; QUANTUM COMPUTATIONS; REVERSIBLE GATES; REVERSIBLE LOGIC; SEARCH SPACES; TOFFOLI NETWORK SYNTHESIS;

ALGORITHMS; BOOLEAN FUNCTIONS; COMPUTATIONAL LINGUISTICS; COMPUTER AIDED DESIGN; CONVERGENCE OF NUMERICAL METHODS; DIGITAL INTEGRATED CIRCUITS; GRAPH THEORY; HEURISTIC METHODS; INTEGRATED CIRCUIT MANUFACTURE; LOGIC DESIGN; LOGIC GATES; OPTIMAL SYSTEMS; OPTIMIZATION; QUANTUM COMPUTERS;

LOGIC CIRCUITS;

EID: 64549106880     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2009.4796568     Document Type: Conference Paper

References (16)

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