Modeling and analysis of parasitic resistance in double-gate FinFETs

IEEE Transactions on Electron Devices

Volumn 56, Issue 10, 2009, Pages 2291-2296

  Tekleab, Daniel ^a   Samavedam, S ^b   Zeitzoff, P ^c  

^a IBM RESEARCH   (United States)

^b FREESCALE SEMICONDUCTOR INC   (United States)

^c TOSHIBA CORPORATION   (Japan)

Author keywords

Contact resistance; Double gate; FinFET; Series resistance; SOI; Transmission line model (TLM)

Indexed keywords

DOUBLE GATE; FINFET; SERIES RESISTANCE; SOI; TRANSMISSION-LINE MODEL (TLM);

CONTACT RESISTANCE; ELECTRIC LINES; FIELD EFFECT TRANSISTORS; SILICON ON INSULATOR TECHNOLOGY; SIMULATORS;

THREE DIMENSIONAL;

EID: 70350077490     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2028377     Document Type: Article

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