Active threshold compensation circuit for improved performance in cooled CMOS systems

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 4, Issue , 2001, Pages 410-413

  Garrett, Joshua L ^a   Stan, Mircea R ^a  

^a University of Virginia   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS SYSTEMS; COMPENSATION CIRCUITS; OPERATING TEMPERATURE; PERFORMANCE GAIN; SUB-THRESHOLD LEAKAGE CURRENTS;

LEAKAGE CURRENTS;

DIFFERENTIATING CIRCUITS;

EID: 3843142998     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.922260     Document Type: Conference Paper

References (8)

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3. B. Kuo and J. Luo. Low-Voltage CMOS VLSI Circuits. New York: Wiley. 1999.
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5. I. Aller et al., "CMOS Circuit Technology for Sub-Ambient Temperature Operation". ISSCC 2000. p. 215.
6. T. Kuroda et al. "A 0.9-V. 150-MHz. 10-mW. 4 mm2. 2-D Discrete Cosine Transform Core Processor with Variable Threshold-Voltage (VT) Scheme". IEEE Journal of Solid-Stare Circuits. Vol. 31. No. 11, Nov. 1996.
7. R. Pierret. Semiconductor Device Fundamentals. Reading. Massachusetts: Addison-Wesley. 1996.
8. S. Narenda. D. Antoniadis. V. De. "Impact of Using Adaptive Body Bias to Compensated Die-to-Die Vt Variation on Within-die Vt variation". ISLPED 1999. pp. 229-232.