Variability aware modeling of socs: From device variations to manufactured system yield

Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009

Volumn , Issue , 2009, Pages 547-553

  Miranda, M ^a   Dierickx, B ^a   Zuber, P ^a   Dobrovoln, P ^a   Kutscherauer, F ^a   Roussel, P ^a   Poliakov, P ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGY; DEVICE VARIATIONS; DYNAMIC ENERGY; ENERGY VARIATIONS; FEATURE SIZES; FUNCTIONAL YIELD; INDUSTRIAL TESTS; POWER DISSIPATION; PROCESS VARIATION; VARIABILITY AWARE MODELING; WITHIN DIES;

CMOS INTEGRATED CIRCUITS; PROGRAMMABLE LOGIC CONTROLLERS;

DIES;

EID: 67649672454     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2009.4810353     Document Type: Conference Paper

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