Architectures and circuits for software-defined radios: Scaling and scalability for low cost and low energy

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 568-569

  Van Der Perre, L ^a   Bougard, B ^a   Craninckx, J ^a   Dehaene, W ^b   Hollevoet, L ^a   Jayapala, M ^a   Marchal, P ^a   Miranda, M ^a   Raghavan, P ^a   Schuster, T ^a   Wambacq, P ^a   Catthoor, F ^a   Vanbekbergen, P ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SOFTWARE; ENERGY EFFICIENCY; MULTIPROCESSING SYSTEMS; POWER CONTROL; RADIO SYSTEMS; TRANSMITTERS;

ENERGY MANAGERS; ENERGY SCALABILITY;

NETWORKS (CIRCUITS);

EID: 34548815925     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2007.373547     Document Type: Conference Paper

References (6)

1. A. Sinha, A. Wang, and A. P. Chandrakasan, "Energy Scalable System Design," IEEE Trans. VLSI Systems, vol. 10, pp. 135-145, April, 2002.
2. B. Debaillie, et al.," Energy-Scalable OFDM Transmitter Design and Control," DAC, pp. 536-541, July, 2006.
3. J. Craninckx, et al., "A 65fJ/Conversion-Step, 0-50MS/s 0-0.7mW 9bit Charge-Sharing SAR ADC in 90nm Digital CMOS," ISSCC Dig. Tech. Papers, pp. 246-247, Feb., 2007.
4. Peter Geens, et al., "A Small Granular Controlled Leakage Reduction System for SRAMs," J. Solid-State Electronics, vol. 49, pp. 1776-1782, Nov., 2005.
5. H.Wang, et al., "Variable Tapered Pareto Buffer Design and Implementation Allowing Run-Time Configuration for Low Power Embedded SRAMs," IEEE Trans. VLSI Systems, vol. 13, pp. 1127-1135, Oct., 2005.
6. J. Craninckx, et al., "A Fully Reconfigurable Software-Defined Radio Transceiver in 0.13μm CMOS," ISSCC Dig. Tech. Papers, pp. 346-347, Feb., 2007.