Low-power memory-reduced traceback MAP decoding for double-binary convolutional turbo decoder

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 56, Issue 5, 2009, Pages 1005-1016

  Lin, Cheng Hung ^a   Chen, Chun Yu ^a   Wu, An Yeu ^a   Tsai, Tsung Han ^b  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^b NATIONAL CENTRAL UNIVERSITY   (Taiwan)

Author keywords

Low power design; Maximum a posteriori (MAP) algorithm; Turbo decoder

Indexed keywords

CACHE MEMORY; CONVOLUTION; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRIC POWER UTILIZATION; ENERGY EFFICIENCY; GENETIC ALGORITHMS; TURBO CODES; WIMAX;

CONVOLUTIONAL TURBO CODES; LOW-POWER DESIGN; LOW-POWER MEMORY; MAXIMUM A POSTERIORI ALGORITHM; MAXIMUM THROUGH-PUT; OPERATING FREQUENCY; POST LAYOUT SIMULATION; TURBO DECODERS;

ITERATIVE DECODING;

EID: 67649297996     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2009.2017118     Document Type: Conference Paper

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