VLSI architectures for the MAP algorithm

IEEE Transactions on Communications

Volumn 51, Issue 2, 2003, Pages 175-185

  Boutillon, Emmanuel ^a   Gross, Warren J ^b   Gulak, P Glenn ^b  

^a UNIVERSITÉ DE BRETAGNE SUD   (France)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

Forward backward algorithm; MAP estimation; Turbo codes; Very large scale integration (VLSI); Viterbi decoding

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; DECODING; RANDOM ACCESS STORAGE; SCHEDULING; TURBO CODES;

FORWARD-BACKWARD ALGORITHMS;

VLSI CIRCUITS;

EID: 0037311818     PISSN: 00906778     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCOMM.2003.809247     Document Type: Article

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