An analysis of the NBTI-induced threshold voltage shift evaluated by different techniques

IEEE Transactions on Electron Devices

Volumn 56, Issue 5, 2009, Pages 1086-1093

  Ji, Zhigang ^a   Zhang, Jian Fu ^a   Chang, Mo Huai ^a   Kaczer, Ben ^a   Groeseneken, Guido ^b,c  

^a LIVERPOOL JOHN MOORES UNIVERSITY   (United Kingdom)

^b IMEC   (Belgium)

^c UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Bias temperature instability; Degradation; Device lifetime; Negative bias temperature instability (NBTI); On the fly (OTF); Threshold voltage shift

Indexed keywords

BIAS TEMPERATURE INSTABILITY; DEVICE LIFETIME; NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI); ON-THE-FLY (OTF); THRESHOLD VOLTAGE SHIFT;

APPROXIMATION THEORY; DEGRADATION; EXTRAPOLATION; MEASUREMENT ERRORS; MOSFET DEVICES; NEGATIVE TEMPERATURE COEFFICIENT; OPTICAL TRANSFER FUNCTION; THERMODYNAMIC STABILITY;

THRESHOLD VOLTAGE;

EID: 67349271701     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2016400     Document Type: Article

References (18)

1. J. S. Suehle, "Ultrathin gate oxide reliability: Physical models, statistics, and characterization," IEEE Trans. Electron Devices, vol. 49, no. 6, pp. 958-971, Jun. 2002.
2. W. D. Zhang, J. F. Zhang, C. Z. Zhao, M. H. Chang, G. Groseneken, and R. Degraeve, "Electrical signature of the defect associated with gate oxide breakdown," IEEE Electron Device Lett., vol. 27, no. 5, pp. 393-395, May 2006.
3. S. S. Tan, T. P. Chen, J. M. Soon, K. P. Loh, C. H. Ang, and L. Chen, "Nitrogen-enhanced negative bias temperature instability: An insight by experiment and first-principle calculations," Appl. Phys. Lett., vol. 82, no. 12, pp. 1881-1883, Mar. 2003.
4. J. F. Zhang, M. H. Chang, and G. Groeseneken, "Effects of measurement temperature on NBTI," IEEE Electron Device Lett., vol. 28, no. 4, pp. 298-300, Apr. 2007.
5. M. Denais, A. Bravaix, V. Huard, C. Parthasarathy, G. Ribes, F. Perrier, Y. Rey-Tauriac, and N. Revil, "On-the-fly characterization of NBTI in ultra-thin gate oxide PMOSFETs," in IEDM Tech. Dig., 2004, pp. 109-112.
6. M. H. Chang and J. F. Zhang, "On positive charges formed under negative bias temperature stresses," J. Appl. Phys., vol. 101, no. 2, p. 024 516, Jan. 2007.
7. T. Yang, M. F. Li, C. Shen, C. H. Ang, C. Zhu, Y.-C. Yeo, G. Samudra, S. C. Rustagi, M. B. Yu, and D. L. Kwong, "Fast and slow dynamic NBTI components in p-MOSFET with SiON dielectric and their impact on device life-time and circuit application," in VLSI Symp. Tech. Dig., 2005, pp. 92-93.
8. J. F. Zhang, Z. Ji, M. H. Chang, B. Kaczer, and G. Groeseneken, "Real Vth instability of pMOSFETs under practical operation conditions," in IEDM Tech. Dig., 2007, pp. 817-820.
9. C. H. Liu, M. T. Lee, C.-Y. Lin, J. Chen, K. Schruefer, J. Brighten, N. Rovedo, T. B. Hook, M. V. Khare, S.-F. Huang, C. Wann, T.-C. Chen, and T. H. Ning, "Mechanism and process dependence of negative bias temperature instability (NBTI) for pMOSFETs with ultrathin gate dielectrics," in IEDM Tech. Dig., 2001, pp. 861-864.
10. Y. Mitani, M. Nagamine, H. Satake, and A. Toriumi, "NBTI mechanism in ultra-thin gate dielectric: Nitrogen-originated mechanism in SiON," in IEDM Tech. Dig., 2002, pp. 509-512.
11. J. F. Zhang, H. K. Sii, G. Groeseneken, and R. Degraeve, "Hole trapping and trap generation in the gate silicon dioxide," IEEE Trans. Electron Devices, vol. 48, no. 6, pp. 1127-1135, Jun. 2001.
12. H. Reisinger, U. Brunner, W. Heinrigs, W. Gustin, and C. Schlunder, "A comparison of fast methods for measuring NBTI degradation," IEEE Trans. Device Mater. Rel., vol. 7, no. 4, pp. 531-539, Dec. 2007.
13. T. Yuan and T. H. Ning, Fundamentals of Modern VLSI devices. Cambridge, U.K.: Cambridge Univ. Press, 1998.
14. N. Arora, MOSFET Modeling for VLSI Simulation: Theory and Practice Singapore: World Scientific, 2006.
15. J. F. Zhang, C. Z. Zhao, A. H. Chen, G. Groeseneken, and R. Degraeve, "Hole traps in silicon dioxides - Part 1: Properties," IEEE Trans. Electron Devices, vol. 51, no. 8, pp. 1267-1273, Aug. 2004.
16. C. Z. Zhao, J. F. Zhang, G. Groeseneken, and R. Degraeve, "Hole traps in silicon dioxides - Part 2: Generation mechanism," IEEE Trans. Electron Devices, vol. 51, no. 8, pp. 1274-1280, Aug. 2004.
17. C. Z. Zhao, J. F. Zhang, M. H. Chang, A. R. Peaker, S. Hall, G. Groeseneken, L. Pantisano, S. De Gendt, and M. Heyns, "Stressinduced positive charge in Hf-based gate dielectrics: Impact on device performance and a framework for the defect," IEEE Trans. Electron Devices, vol. 55, no. 7, pp. 1647-1656, Jul. 2008.
18. W. D. Zhang, J. F. Zhang, M. J. Uren, G. Groeseneken, R. Degraeve, M. Lalor, and D. Burton, "On the interface states generated under different stress conditions," Appl. Phys. Lett., vol. 79, no. 19, pp. 3092-3094, Nov. 2001.