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Volumn 7, Issue 4, 2007, Pages 531-539

A comparison of fast methods for measuring NBTI degradation

Author keywords

Measuring delay; MOSFET; Negative bias temperature instability (NBTI); pMOS; Recovery

Indexed keywords

DATA REDUCTION; DELAY CIRCUITS; MEASUREMENT ERRORS; STATISTICAL METHODS; TEMPERATURE MEASUREMENT;

EID: 37548999696     PISSN: 15304388     EISSN: 15304388     Source Type: Journal    
DOI: 10.1109/TDMR.2007.911385     Document Type: Article
Times cited : (69)

References (14)
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    • A. T. Krishnan, V. Reddy, S. Chakravarti, J. Rodriguez, S. John, and S. Krishnan, "NBTT impact on transistor & circuit: Models, mechanism. & scaling effects," in IEDM Tech. Dig., 2003, pp. 14.5.1-14.5.4.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.