A fully integrated 24GHz 8-path phased-array receiver in silicon

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Hashemi, Hossein ^a,b   Guan, Xiang ^b   Hajimiri, Ali ^b  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

^b CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

LOW NOISE PREAMPLIFIERS (LNA); MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO); PHASE-ARRAY RECEIVERS;

AMPLIFIERS (ELECTRONIC); CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; NATURAL FREQUENCIES; SIGNAL TO NOISE RATIO; SILICON; SYNTHETIC APERTURE RADAR;

SIGNAL RECEIVERS;

EID: 84867695972     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. D. Lu et al., "Investigation of Indoor Radio Channel from 2.4GHz to 24GHz," IEEE AP-S Int. Symp. Dig. Papers, pp. 134-137, June 2003.
2. Federal Communications Commission, FCC 02-04, Section 15.515.15.521.
3. J. Savoj et al., "A 10-Gb/s CMOS Clock and Data Recovery Circuit With a Half-Rate Binary Phase-Frequency Detector," IEEE J. Solid-State Circuits, vol. 38, no. 1, pp. 13-21, Jan. 2003.
4. max) HBT and ASIC-Compatible CMOS Using Copper Interconnect," BCTM Proceedings, pp. 143-146, 2001.