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Volumn 88, Issue 4, 2008, Pages 581-610

Analysis of static data flow structures

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; DATA STRUCTURES; FLOW STRUCTURE; GAME THEORY; GRAPH THEORY; INFORMATION THEORY; MARINE BIOLOGY; MATHEMATICAL MODELS; MODEL CHECKING; MODEL STRUCTURES; PETRI NETS; SEMANTICS;

EID: 58149508168     PISSN: 01692968     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (31)
  • 1
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    • Counterflow pipelining: Architectural support for preemption in asynchronous systems using anti-tokens
    • November
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    • (2006) Proc. International Conference Computer-Aided Design (ICCAD)
    • Ampalam, M.1    Singh, M.2
  • 5
    • 34547239448 scopus 로고    scopus 로고
    • Ph.D. Thesis, Dept. of Computer Science, University of Manchester
    • Brej, C: Early output logic and anti-tokens, Ph.D. Thesis, Dept. of Computer Science, University of Manchester, 2005.
    • (2005) Early output logic and anti-tokens
    • Brej, C.1
  • 8
    • 0033328531 scopus 로고    scopus 로고
    • Average-case technology mapping of asynchronous burst-mode circuits
    • October
    • Chou, W.-C., Beerel, P. A., Yun, K. Y: Average-case technology mapping of asynchronous burst-mode circuits, IEEE Transactions on Computer-Aided Design, 18(10), October 1999, 1418-1434.
    • (1999) IEEE Transactions on Computer-Aided Design , vol.18 , Issue.10 , pp. 1418-1434
    • Chou, W.-C.1    Beerel, P.A.2    Yun, K.Y.3
  • 12
    • 0003885785 scopus 로고    scopus 로고
    • Minimalist: An environment for the synthesis, verification and testability of burst-mode asynchronous machines
    • CUCS-020-99, Columbia University, July
    • Fuhrer, R. M., Nowick, S. M., Theobald, M., Jha, N. K., Lin, B., Plana, L.: Minimalist: an environment for the synthesis, verification and testability of burst-mode asynchronous machines, Technical Report TR CUCS-020-99, Columbia University, July 1999.
    • (1999) Technical Report TR
    • Fuhrer, R.M.1    Nowick, S.M.2    Theobald, M.3    Jha, N.K.4    Lin, B.5    Plana, L.6
  • 14
    • 0003612514 scopus 로고
    • Concurrent hardware: The theory and practice of self-timed design
    • Wiley-Interscience, John Wiley& Sons, Inc
    • Kishinevsky, M., Kondratyev, A., Taubin, A., Varshavsky, V.: Concurrent hardware: the theory and practice of self-timed design, Series in Parallel Computing, Wiley-Interscience, John Wiley& Sons, Inc., 1994.
    • (1994) Series in Parallel Computing
    • Kishinevsky, M.1    Kondratyev, A.2    Taubin, A.3    Varshavsky, V.4
  • 15
    • 0036646467 scopus 로고    scopus 로고
    • Design of asynchronous circuits using synchronous CAD tools
    • Kondratyev, A., Lwin, K.: Design of asynchronous circuits using synchronous CAD tools, IEEE Design & Test of Computers, 19(4), 2002, 107-117.
    • (2002) IEEE Design & Test of Computers , vol.19 , Issue.4 , pp. 107-117
    • Kondratyev, A.1    Lwin, K.2
  • 16
    • 0030244752 scopus 로고    scopus 로고
    • Phased Logic: Supporting the synchronous design paradigm with delay-insensitive circuitry
    • September
    • Linder, D. H., Harden, J. C: Phased Logic: supporting the synchronous design paradigm with delay-insensitive circuitry, IEEE Transactions on Computers, 45, September 1996,1031-1044.
    • (1996) IEEE Transactions on Computers , vol.45 , pp. 1031-1044
    • Linder, D.H.1    Harden, J.C.2
  • 23
    • 17644364039 scopus 로고    scopus 로고
    • Design and analysis of dual-rail circuits for security applications
    • April
    • Sokolov, D., Murphy, J. P., Bystrov, A., Yakovlev, A.: Design and analysis of dual-rail circuits for security applications, IEEE Transactions on Computers, 54(4), April 2005,449-460.
    • (2005) IEEE Transactions on Computers , vol.54 , Issue.4 , pp. 449-460
    • Sokolov, D.1    Murphy, J.P.2    Bystrov, A.3    Yakovlev, A.4
  • 28
    • 2942695812 scopus 로고    scopus 로고
    • Decomposition in asynchronous circuit design
    • Concurrency and Hardware Design J. Cortadella, A. Yakovlev, G. Rozenberg, Eds, of, Springer-Verlag
    • Vogler, W., Wollowski, R.: Decomposition in asynchronous circuit design, in: Concurrency and Hardware Design (J. Cortadella, A. Yakovlev, G. Rozenberg, Eds.), vol. 2549 of Lecture Notes in Computer Science, Springer-Verlag, 2002, 152-190.
    • (2002) Lecture Notes in Computer Science , vol.2549 , pp. 152-190
    • Vogler, W.1    Wollowski, R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.