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Volumn , Issue , 2006, Pages 611-618

Counterflow pipelining: Architectural support for preemption in asynchronous systems using anti-tokens

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CALCULATIONS; DESIGN; ENERGY CONSERVATION; PIPELINES; THROUGHPUT;

EID: 34547322093     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2006.320024     Document Type: Conference Paper
Times cited : (22)

References (7)
  • 1
    • 34547239448 scopus 로고    scopus 로고
    • PhD thesis, Department of Computer Science, University of Manchester
    • C. Brej. Early Output and Anti-Tokens. PhD thesis, Department of Computer Science, University of Manchester, 2005.
    • (2005) Early Output and Anti-Tokens
    • Brej, C.1
  • 3
    • 0003705271 scopus 로고    scopus 로고
    • An introduction to asynchronous circuit design
    • Technical Report UUCS-97-013, Dept. of Computer Science, University of Utah, Sept
    • A. Davis and S. M. Nowick. An introduction to asynchronous circuit design. Technical Report UUCS-97-013, Dept. of Computer Science, University of Utah, Sept. 1997.
    • (1997)
    • Davis, A.1    Nowick, S.M.2
  • 6
    • 0035186879 scopus 로고    scopus 로고
    • MOUSETRAP: Ultra-high-speed transition-signaling asynchronous pipelines
    • M. Singh and S. M. Nowick. MOUSETRAP: Ultra-high-speed transition-signaling asynchronous pipelines. In Proc. Int. Conf. Computer Design (ICCD), pages 9-17, 2001.
    • (2001) Proc. Int. Conf. Computer Design (ICCD) , pp. 9-17
    • Singh, M.1    Nowick, S.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.