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Volumn 54, Issue 4, 2005, Pages 449-460

Design and analysis of dual-rail circuits for security applications

Author keywords

Alternating spacer protocol; Cryptography; Design automation; Dual rail encoding, hardware security; Hazard free design; Power analysis

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER CIRCUITS; CRYPTOGRAPHY; DATA COMMUNICATION SYSTEMS; DESIGN; ENCODING (SYMBOLS); LOGIC GATES; NETWORK PROTOCOLS; OPTIMIZATION; SECURITY OF DATA;

EID: 17644364039     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2005.61     Document Type: Article
Times cited : (115)

References (22)
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  • 5
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    • "A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards"
    • K. Tiri, M. Akmal, and I. Verbauwhede, "A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards," Proc. European Solid-State Circuits Conf. (ESSCIRC), 2002.
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    • Tiri, K.1    Akmal, M.2    Verbauwhede, I.3
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    • "A Logical Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation"
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    • (2004) Proc. Design and Test in Europe Conf. (DATE)
    • Tiri, K.1    Verbauwhede, I.2
  • 9
    • 0036646467 scopus 로고    scopus 로고
    • "Design of Asynchronous Circuits Using Synchronous CAD Tools"
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    • Kondratyev, A.1    Lwin, K.2
  • 13
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    • "An Efficient Implementation of Boolean Functions as Self-Timed Circuits"
    • Jan
    • I. David, R. Ginosar, and M. Yoeli, "An Efficient Implementation of Boolean Functions as Self-Timed Circuits," IEEE Trans. Computers, vol. 41, no. 1, pp. 2-11, Jan. 1992.
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    • David, I.1    Ginosar, R.2    Yoeli, M.3
  • 17
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    • "Federal Information Processing Standard 197, The Advanced Encryption Standard (AES)"
    • Nat'l Inst. of Standards and Technology
    • Nat'l Inst. of Standards and Technology, "Federal Information Processing Standard 197, The Advanced Encryption Standard (AES),"http://csrc.nist.gov/publications/fips/fips197/fips197.pdf, 2001.
    • (2001)
  • 19
    • 34547557195 scopus 로고    scopus 로고
    • "Advanced Encryption Standard/Rijndael IP Core"
    • R. Usselmann, "Advanced Encryption Standard/Rijndael IP Core," http://www.asic.ws/, 2004.
    • (2004)
    • Usselmann, R.1
  • 20
    • 0038300424 scopus 로고    scopus 로고
    • "A Highly Regular and Scalable AES Hardware Architecture"
    • Apr
    • S. Mangard, M. Aigner, and S. Dominikus, "A Highly Regular and Scalable AES Hardware Architecture," IEEE Trans. Computers, vol. 52, no. 4, pp. 483-491, Apr. 2003.
    • (2003) IEEE Trans. Computers , vol.52 , Issue.4 , pp. 483-491
    • Mangard, S.1    Aigner, M.2    Dominikus, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.