On the models for asynchronous circuit behaviour with OR causality

Formal Methods in System Design

Volumn 9, Issue 3, 1996, Pages 189-233

  Yakovlev, Alexandre ^a   Kishinevsky, Michael ^b   Kondratyev, Alex ^b   Lavagno, Luciano ^c   Pietkiewicz Koutny, Marta ^a  

^a NEWCASTLE UNIVERSITY   (United Kingdom)

^b UNIVERSITY OF AIZU   (Japan)

^c POLITECNICO DI TORINO   (Italy)

Author keywords

(AND and OR) causality; Asynchronous circuits; Causal logic nets; Change diagrams; Concurrency; Input output automata; Modeling; Petri nets; Signal transition graphs

Indexed keywords

FORMAL LANGUAGES; FORMAL LOGIC; GRAPH THEORY; MATHEMATICAL MODELS; PETRI NETS; TURING MACHINES;

AND CAUSALITY; ASYNCHRONOUS CIRCUITS; OR CAUSALITY; SIGNAL TRANSITION GRAPHS;

ELECTRIC NETWORK SYNTHESIS;

EID: 0030290484     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1007/BF00122082     Document Type: Article

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