Characterization of fast relaxation during BTI stress in conventional and advanced CMOS devices with HfO2 gate stacks

IEEE Transactions on Electron Devices

Volumn 55, Issue 11, 2008, Pages 3175-3183

  Kerber, Andreas ^a   Maitra, Kingsuk ^a   Majumdar, Amlan ^b   Hargrove, Mike ^a   Carter, Rick J ^a   Cartier, Eduard Albert ^b  

^a ADVANCED MICRO DEVICES   (United States)

^b IBM RESEARCH   (United States)

Author keywords

Charge trapping; High k; NBTI; PBTI; Relaxation

Indexed keywords

CHARGE TRAPPING; COMPUTER PERIPHERAL EQUIPMENT; HAFNIUM COMPOUNDS; INTERFACES (COMPUTER); NEGATIVE TEMPERATURE COEFFICIENT; SILICON; THERMODYNAMIC STABILITY; TIN; TITANIUM COMPOUNDS; TITANIUM NITRIDE;

CHARGE REMOVALS; CMOS DEVICES; DELAY TIMES; FAST RELAXATIONS; FAST SENSING; FIRST ORDERS; GATE STACKS; HIGH-K; LINEAR CURRENTS; MEASUREMENT SYSTEMS; NBTI; ORDERS OF MAGNITUDES; PBTI; PCI CARDS; RELAXATION; RELAXATION MEASUREMENTS; SYSTEMATIC STUDIES; TIME DEPENDENCES; TIN GATES; VOLTAGE RESOLUTIONS;

LOGIC GATES;

EID: 56549113808     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2008.2004853     Document Type: Article

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