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Volumn 4943 LNCS, Issue , 2008, Pages 209-220

The instruction-set extension problem: A survey

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CAVITY RESONATORS;

EID: 51849159146     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-78610-8_21     Document Type: Conference Paper
Times cited : (31)

References (62)
  • 1
    • 0036398199 scopus 로고    scopus 로고
    • From ASIC to ASIP: The next design discontinuity
    • Keutzer,: From ASIC to ASIP: The next design discontinuity. In: ICCD 2002 (2002)
    • (2002) ICCD
    • Keutzer1
  • 3
    • 0013372151 scopus 로고
    • Generating instruction sets and microarchitectures from applications
    • Huang: Generating instruction sets and microarchitectures from applications. In: ICCAD 1994, (1994)
    • (1994) ICCAD 1994
    • Huang1
  • 4
    • 0003682978 scopus 로고
    • Synthesis of instruction sets for pipelined microprocessors
    • Huang: Synthesis of instruction sets for pipelined microprocessors. In: DAC 1994, (1994)
    • (1994) DAC
    • Huang1
  • 5
    • 51849104475 scopus 로고    scopus 로고
    • Van Praet: Instruction set definition and instruction selection for ASIPs. In: ISSS 1994, (1994)
    • Van Praet: Instruction set definition and instruction selection for ASIPs. In: ISSS 1994, (1994)
  • 6
    • 51849118030 scopus 로고    scopus 로고
    • Liem: Instruction-set matching and selection for DSP and ASIP code generation. In: ED & TC 1994, (1994)
    • Liem: Instruction-set matching and selection for DSP and ASIP code generation. In: ED & TC 1994, (1994)
  • 7
    • 0032653125 scopus 로고    scopus 로고
    • Synthesis of application specific instructions for embedded DSP software
    • Choi,: Synthesis of application specific instructions for embedded DSP software. IEEE Trans. on Comp. 48(6), 603-614 (1999)
    • (1999) IEEE Trans. on Comp , vol.48 , Issue.6 , pp. 603-614
    • Choi1
  • 8
    • 51849095742 scopus 로고    scopus 로고
    • Faraboschi,: LX: a technology platform for customizable VLIW embedded processing. ACM SIGARCH Computer Architecture News, Special Issue. In: Proceedings of the 27th annual international symposium on Computer architecture (ISCA 2000) 28(2), 203-213 (2003)
    • Faraboschi,: LX: a technology platform for customizable VLIW embedded processing. ACM SIGARCH Computer Architecture News, Special Issue. In: Proceedings of the 27th annual international symposium on Computer architecture (ISCA 2000) 28(2), 203-213 (2003)
  • 9
    • 51849103603 scopus 로고    scopus 로고
    • Hardware/software instruction set configurability for System-on-Chip processors
    • Wang: Hardware/software instruction set configurability for System-on-Chip processors. In: DAC 2001 (2001)
    • (2001) DAC
    • Wang1
  • 10
    • 0034827438 scopus 로고    scopus 로고
    • Designing domain-specific processors
    • Arnold: Designing domain-specific processors. In: CODES 2001(2001)
    • (2001) CODES
    • Arnold1
  • 11
    • 0036826798 scopus 로고    scopus 로고
    • Instruction generation for hybrid reconfigurable systems
    • Kastner,: Instruction generation for hybrid reconfigurable systems. ACM TO-DAES 7(4), 605-627 (2002)
    • (2002) ACM TO-DAES , vol.7 , Issue.4 , pp. 605-627
    • Kastner1
  • 12
    • 0042635850 scopus 로고    scopus 로고
    • Automatic application-specific instruction-set extensions under microarchitectural constraints
    • Atasu: Automatic application-specific instruction-set extensions under microarchitectural constraints. In: DAC 2003 (2003)
    • (2003) DAC
    • Atasu1
  • 13
    • 27644497563 scopus 로고    scopus 로고
    • Atasu: An integer linear programming approach for identifying instruction-set extensions. In: CODES+ISSS 2005 (2005)
    • Atasu: An integer linear programming approach for identifying instruction-set extensions. In: CODES+ISSS 2005 (2005)
  • 14
    • 34547236616 scopus 로고    scopus 로고
    • Galuzzi: Automatic selection of application-specific instruction-set extensions. In: CODES+ISSS 2006 (2006)
    • Galuzzi: Automatic selection of application-specific instruction-set extensions. In: CODES+ISSS 2006 (2006)
  • 15
    • 51849139352 scopus 로고    scopus 로고
    • Alomary: A hardware/software codesign partitioner for ASIP design. In: ICECS 1996 (1996)
    • Alomary: A hardware/software codesign partitioner for ASIP design. In: ICECS 1996 (1996)
  • 16
    • 0027561268 scopus 로고
    • Processor reconfiguration through instruction-set metamorphosis
    • Athanas,: Processor reconfiguration through instruction-set metamorphosis. IEEE Computer 26(3), 11-18 (1993)
    • (1993) IEEE Computer , vol.26 , Issue.3 , pp. 11-18
    • Athanas1
  • 17
    • 0028753892 scopus 로고
    • PRISC software acceleration techniques
    • Razdan: PRISC software acceleration techniques. In: ICCS 1994 (1994)
    • (1994) ICCS
    • Razdan1
  • 21
    • 51849105014 scopus 로고    scopus 로고
    • Hauser: GARP: a mips processor with a reconfigurable coprocessor. In: FCCM 1997 (1997)
    • Hauser: GARP: a mips processor with a reconfigurable coprocessor. In: FCCM 1997 (1997)
  • 22
    • 0029734631 scopus 로고    scopus 로고
    • Hardware/software partitioning using integer programming
    • Niemann: Hardware/software partitioning using integer programming. In: EDTC 1996 (1996)
    • (1996) EDTC
    • Niemann1
  • 23
    • 0031096921 scopus 로고    scopus 로고
    • An algorithm for hardware/software partitioning using mixed integer linear programming
    • Niemann,: An algorithm for hardware/software partitioning using mixed integer linear programming. ACM TODAES, Special Issue: Partitioning Methods for Embedded Systems 2(2), 165-193 (1997)
    • (1997) ACM TODAES, Special Issue: Partitioning Methods for Embedded Systems , vol.2 , Issue.2 , pp. 165-193
    • Niemann1
  • 24
    • 0031101696 scopus 로고    scopus 로고
    • Hardware/software co-design
    • De Micheli,: Hardware/software co-design. Proc. of IEEE 85(3), 349-365 (1997)
    • (1997) Proc. of IEEE , vol.85 , Issue.3 , pp. 349-365
    • Micheli, D.1
  • 25
    • 3543102614 scopus 로고    scopus 로고
    • HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform
    • Baleani, Sangiovanni-Vincentelli, A.: HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform. In: CODES 2002 (2002)
    • (2002) CODES
    • Baleani, S.-V.A.1
  • 26
    • 51849103147 scopus 로고    scopus 로고
    • Arató: Hardware-software partitioning in embedded system design. In: WISP 2003 (2003)
    • Arató: Hardware-software partitioning in embedded system design. In: WISP 2003 (2003)
  • 27
    • 84882106773 scopus 로고    scopus 로고
    • Instruction set selection for ASIP design
    • Gschwind: Instruction set selection for ASIP design. In: CCODES 1999 (1999)
    • (1999) CCODES
    • Gschwind1
  • 28
    • 51849142123 scopus 로고    scopus 로고
    • Pozzi: Automatic topology-based identification of instruction-set extensions for embedded processors. Technical Report CS 01/377, EPFL, DI-LAP, Lausanne (December 2001)
    • Pozzi: Automatic topology-based identification of instruction-set extensions for embedded processors. Technical Report CS 01/377, EPFL, DI-LAP, Lausanne (December 2001)
  • 29
    • 51849095210 scopus 로고    scopus 로고
    • Clark: Automatically generating custom instruction set extensions. In: WASP 2002 (2002)
    • Clark: Automatically generating custom instruction set extensions. In: WASP 2002 (2002)
  • 30
    • 51849137257 scopus 로고    scopus 로고
    • Peymandoust: Automatic instruction set extension and utilization for embedded processors. In: ASAP (2003)
    • Peymandoust: Automatic instruction set extension and utilization for embedded processors. In: ASAP (2003)
  • 31
    • 51849091345 scopus 로고    scopus 로고
    • Clark,: Processor acceleration through automated instruction set customization. In: MICRO 36
    • Clark,: Processor acceleration through automated instruction set customization. In: MICRO 36
  • 32
    • 51849098841 scopus 로고    scopus 로고
    • Cong: Application-specific instruction generation for configurable processor architectures. In: FPGA 2004 (2004)
    • Cong: Application-specific instruction generation for configurable processor architectures. In: FPGA 2004 (2004)
  • 33
    • 0026981973 scopus 로고
    • Partitioning by regularity extraction
    • Rao, S.: Partitioning by regularity extraction. In: DAC 1992 (1992)
    • (1992) DAC
    • Rao, S.1
  • 34
    • 0032668792 scopus 로고    scopus 로고
    • Automatic detection of recurring operation patterns
    • Arnold: Automatic detection of recurring operation patterns. In: CODES 1999 (1999)
    • (1999) CODES
    • Arnold1
  • 35
    • 0035211904 scopus 로고    scopus 로고
    • Instruction generation for hybrid reconfigurable systems
    • Kastner: Instruction generation for hybrid reconfigurable systems. In: ICCAD 2001 (2001)
    • (2001) ICCAD 2001
    • Kastner1
  • 36
    • 0008690083 scopus 로고    scopus 로고
    • The graph isomorphism problem
    • 96-20, Department of Computing Science, University of Alberta, Canada July
    • Fortin: The graph isomorphism problem. Technical Report TR 96-20, Department of Computing Science, University of Alberta, Canada (July 1996)
    • (1996) Technical Report TR
    • Fortin1
  • 37
    • 0030105339 scopus 로고    scopus 로고
    • Graph isomorphism and identification matrices: Parallel algorithms
    • Chen,: Graph isomorphism and identification matrices: Parallel algorithms. IEEE Trans. on Paral. and Distr. Systems 7(3), 308-319 (1996)
    • (1996) IEEE Trans. on Paral. and Distr. Systems , vol.7 , Issue.3 , pp. 308-319
    • Chen1
  • 38
    • 0029212471 scopus 로고
    • New ideas for solving covering problems
    • Coudert: New ideas for solving covering problems. In: DAC 1995 (1995)
    • (1995) DAC
    • Coudert1
  • 39
    • 0029719534 scopus 로고    scopus 로고
    • On solving covering problems
    • Coudert: On solving covering problems. In: DAC 1996 (1996)
    • (1996) DAC
    • Coudert1
  • 40
    • 77952993550 scopus 로고    scopus 로고
    • Instruction generation and regularity extraction for reconfigurable processors
    • Brisk: Instruction generation and regularity extraction for reconfigurable processors. In: CASES 2002 (2002)
    • (2002) CASES
    • Brisk1
  • 41
    • 24944546345 scopus 로고    scopus 로고
    • Scalable custom instructions identification for instruction-set extensible processors
    • Yu: Scalable custom instructions identification for instruction-set extensible processors. In: CASES 2004 (2004)
    • (2004) CASES
    • Yu1
  • 42
    • 84869345560 scopus 로고    scopus 로고
    • Removing communications in clustered microarchitectures through instruction replication
    • Aletà,: Removing communications in clustered microarchitectures through instruction replication. ACM TACO 1(2), 127-151 (2004)
    • (2004) ACM TACO , vol.1 , Issue.2 , pp. 127-151
    • Aletà1
  • 43
    • 34548101126 scopus 로고    scopus 로고
    • Vassiliadis, S., Bertels, K., Galuzzi, C.: A Linear Complexity Algorithm for the Automatic Generation of Convex Multiple Input Multiple Output Instructions. In: Diniz, P.C., Marques, E., Bertels, K., Fernandes, M.M., Cardoso, J.M.P. (eds.) ARCS 2007. LNCS, 4419, pp. 130-141. Springer, Heidelberg (2007)
    • Vassiliadis, S., Bertels, K., Galuzzi, C.: A Linear Complexity Algorithm for the Automatic Generation of Convex Multiple Input Multiple Output Instructions. In: Diniz, P.C., Marques, E., Bertels, K., Fernandes, M.M., Cardoso, J.M.P. (eds.) ARCS 2007. LNCS, vol. 4419, pp. 130-141. Springer, Heidelberg (2007)
  • 44
    • 51849130238 scopus 로고    scopus 로고
    • Galuzzi: A linear complexity algorithm for the generation of multiple input single output instructions of variable size. In: SAMOS VII Works
    • Galuzzi: A linear complexity algorithm for the generation of multiple input single output instructions of variable size. In: SAMOS VII Works
  • 45
    • 0029488328 scopus 로고
    • Instruction selection using binate covering for code size optimization
    • Liao: Instruction selection using binate covering for code size optimization. In: ICCAD 1995 (1995)
    • (1995) ICCAD 1995
    • Liao1
  • 46
    • 33645604364 scopus 로고    scopus 로고
    • Liao,: A new viewpoint on code generation for directed acyclic graphs. ACM TO-DAES 3(1), 51-75 (1998)
    • Liao,: A new viewpoint on code generation for directed acyclic graphs. ACM TO-DAES 3(1), 51-75 (1998)
  • 47
    • 0027647414 scopus 로고
    • On clustering for maximal regularity extraction
    • Rao, S.: On clustering for maximal regularity extraction. IEEE Trans, on CAD 12(8), 1198-1208 (1993)
    • (1993) IEEE Trans, on CAD , vol.12 , Issue.8 , pp. 1198-1208
    • Rao, S.1
  • 48
    • 0027666418 scopus 로고
    • Hierarchical design space exploration for a class of digital systems
    • Rao, S.: Hierarchical design space exploration for a class of digital systems. IEEE Trans. on VLSI Systems 1(3), 282-295 (1993)
    • (1993) IEEE Trans. on VLSI Systems , vol.1 , Issue.3 , pp. 282-295
    • Rao, S.1
  • 49
    • 51849164408 scopus 로고    scopus 로고
    • Janssen: A specification invariant technique for regularity improvement between flow-graph clusters. In: EDTC 1996 (1996)
    • Janssen: A specification invariant technique for regularity improvement between flow-graph clusters. In: EDTC 1996 (1996)
  • 50
    • 0037682301 scopus 로고    scopus 로고
    • Managing dynamic reconfiguration overhead in system-on-a-chip design using reconfigurable datapaths and optimized interconnection networks
    • Huang: Managing dynamic reconfiguration overhead in system-on-a-chip design using reconfigurable datapaths and optimized interconnection networks. In: DATE 2001 (2001)
    • (2001) DATE
    • Huang1
  • 51
    • 0036957219 scopus 로고    scopus 로고
    • Datapath merging and interconnection sharing for reconfigurable architectures
    • Moreano: Datapath merging and interconnection sharing for reconfigurable architectures. In: ISSS 2002 (2002)
    • (2002) ISSS
    • Moreano1
  • 52
    • 0348128870 scopus 로고    scopus 로고
    • Synthesis of custom processors based on extensible platforms
    • Sun: Synthesis of custom processors based on extensible platforms. In: ICCAD 2002 (2002)
    • (2002) ICCAD 2002
    • Sun1
  • 53
    • 51849117572 scopus 로고    scopus 로고
    • Imai: An integer programming approach to instruction implementation method selection problem. In: EURO-DAC 1992 (1992)
    • Imai: An integer programming approach to instruction implementation method selection problem. In: EURO-DAC 1992 (1992)
  • 54
    • 0001442299 scopus 로고    scopus 로고
    • Grasselli,: A method for minimizing the number of internal states in incompletely specified sequential networks. IEEE Trans. Electron. Comp. EC-14, 350-359 (1965)
    • Grasselli,: A method for minimizing the number of internal states in incompletely specified sequential networks. IEEE Trans. Electron. Comp. EC-14, 350-359 (1965)
  • 55
    • 51849139760 scopus 로고
    • Boolean relations and the incomplete specification of logic networks
    • Brayton: Boolean relations and the incomplete specification of logic networks. In: ICCAD 1989 (1989)
    • (1989) ICCAD 1989
    • Brayton1
  • 56
    • 0030646021 scopus 로고    scopus 로고
    • Solving covering problems using LPR-based lower bounds
    • Liao: Solving covering problems using LPR-based lower bounds. In: DAC 1997 (1997)
    • (1997) DAC
    • Liao1
  • 57
    • 27944432110 scopus 로고    scopus 로고
    • Effective bounding techniques for solving unate and binate covering problems
    • Li: Effective bounding techniques for solving unate and binate covering problems. In: DAC 2005 (2005)
    • (2005) DAC
    • Li1
  • 58
    • 51849085965 scopus 로고    scopus 로고
    • Alippi: A DAG-based design approach for reconfigurable VLIW processors. In: DATE 1999 (1999)
    • Alippi: A DAG-based design approach for reconfigurable VLIW processors. In: DATE 1999 (1999)
  • 59
    • 51849089972 scopus 로고    scopus 로고
    • The spiral search: A linear complexity algorithm for the generation of convex multiple input multiple output instruction-set extensions
    • Galuzzi: The spiral search: A linear complexity algorithm for the generation of convex multiple input multiple output instruction-set extensions. In: ICFPT 2007 (2007)
    • (2007) ICFPT
    • Galuzzi1
  • 60
    • 38849103565 scopus 로고    scopus 로고
    • An Efficient Framework for Dynamic Reconfiguration of Instruction-Set Customizations
    • Huynh: An Efficient Framework for Dynamic Reconfiguration of Instruction-Set Customizations. In: CASES 2007 (2007)
    • (2007) CASES
    • Huynh1
  • 61
    • 48149106346 scopus 로고    scopus 로고
    • Disjoint pattern enumeration for custom instructions identification
    • Yu: Disjoint pattern enumeration for custom instructions identification. In: FPL 2007 (2007)
    • (2007) FPL
    • Yu1
  • 62
    • 51849093355 scopus 로고    scopus 로고
    • Bonzini: A retargetable framework for automated discovery of custom instructions. In: ASAP 2007 (2007)
    • Bonzini: A retargetable framework for automated discovery of custom instructions. In: ASAP 2007 (2007)


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