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Volumn 48, Issue 6, 1999, Pages 603-614

Synthesis of application specific instructions for embedded DSP software

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; COMPUTER SOFTWARE; DIGITAL SIGNAL PROCESSING; LOGIC DESIGN; SYSTEMS ANALYSIS;

EID: 0032653125     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.773797     Document Type: Article
Times cited : (51)

References (17)
  • 1
    • 0029757825 scopus 로고    scopus 로고
    • An Evolution Programming Approach on Multiple Behaviors for the Design of Application Specific Programmable Processors
    • W. Zhao and C.A. Papachristou, "An Evolution Programming Approach on Multiple Behaviors for the Design of Application Specific Programmable Processors," Proc. European Design & Test Conference, pp. 144-150, 1996.
    • (1996) Proc. European Design & Test Conference , pp. 144-150
    • Zhao, W.1    Papachristou, C.A.2
  • 5
    • 0028056671 scopus 로고
    • Instruction-Set Matching and Selection for DSP and ASIP Code Generation
    • C. Liem, T. May, and P. Paulin, "Instruction-Set Matching and Selection for DSP and ASIP Code Generation," Proc. European Design and Test Conf., pp. 31-37, 1994.
    • (1994) Proc. European Design and Test Conf. , pp. 31-37
    • Liem, C.1    May, T.2    Paulin, P.3
  • 6
    • 0029505689 scopus 로고
    • Optimal Code Generation for Embedded Memory Non-Homogeneous Register Architectures
    • G. Araujo and S. Malik, "Optimal Code Generation for Embedded Memory Non-Homogeneous Register Architectures," Proc. Int'l Symp. System Synthesis, pp. 36-41, 1995.
    • (1995) Proc. Int'l Symp. System Synthesis , pp. 36-41
    • Araujo, G.1    Malik, S.2
  • 7
    • 0029710317 scopus 로고    scopus 로고
    • Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures
    • G. Araujo, S. Malik, and M.T.-C. Lee, "Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures," Proc. 33rd Design Automation Conf., pp. 591-596, 1996.
    • (1996) Proc. 33rd Design Automation Conf. , pp. 591-596
    • Araujo, G.1    Malik, S.2    Lee, M.T.-C.3
  • 9
    • 0031102303 scopus 로고    scopus 로고
    • Time-Constrained Code Compaction for DSP's
    • Mar.
    • R. Leupers and P. Marwedel, "Time-Constrained Code Compaction for DSP's," IEEE Trans. VLSI Systems, vol. 5, no. 1, pp. 112-122, Mar. 1997.
    • (1997) IEEE Trans. VLSI Systems , vol.5 , Issue.1 , pp. 112-122
    • Leupers, R.1    Marwedel, P.2
  • 10
    • 0026995421 scopus 로고
    • An Integer Programming Approach to Instruction Implementation Method Selection Problem
    • M. Imai, A. Alomary, J. Sato, and N. Hikichi, "An Integer Programming Approach to Instruction Implementation Method Selection Problem," Proc. European Design Automation Conf., pp. 106-111, 1992.
    • (1992) Proc. European Design Automation Conf. , pp. 106-111
    • Imai, M.1    Alomary, A.2    Sato, J.3    Hikichi, N.4
  • 13
    • 0031099006 scopus 로고    scopus 로고
    • Power Analysis and Minimization Techniques for Embedded DSP Software
    • Mar.
    • M.T.-C. Lee, V. Tiwary, S. Malik, and M. Fujita, "Power Analysis and Minimization Techniques for Embedded DSP Software," IEEE Trans. VLSI Systems, vol. 5, no. 1, pp. 123-135, Mar. 1997.
    • (1997) IEEE Trans. VLSI Systems , vol.5 , Issue.1 , pp. 123-135
    • Lee, M.T.-C.1    Tiwary, V.2    Malik, S.3    Fujita, M.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.