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Volumn , Issue , 2004, Pages 123-126

Impact of pocket implant on MOSFET mismatch for advanced CMOS technology

Author keywords

[No Author keywords available]

Indexed keywords

BORON; CMOS INTEGRATED CIRCUITS; GATES (TRANSISTOR); IMPURITIES; LEAKAGE CURRENTS; POLYSILICON; RANDOM PROCESSES;

EID: 3042511476     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (16)

References (10)
  • 1
    • 0024754187 scopus 로고
    • Matching properties of MOS transistors
    • M.J.M. Pelgrom et al., "Matching properties of MOS transistors", IEEE Journal of Solid State Circ, vol. 24, pp 1433, 1989
    • (1989) IEEE Journal of Solid State Circ , vol.24 , pp. 1433
    • Pelgrom, M.J.M.1
  • 2
    • 84907709834 scopus 로고    scopus 로고
    • Impact of parametric mismatch and fluctuations on performance and yield of deep-submicron CMOS technologies
    • H. Tuinhout, "Impact of parametric mismatch and fluctuations on performance and yield of deep-submicron CMOS technologies" ESSDERC 2002, pp95-101
    • ESSDERC 2002 , pp. 95-101
    • Tuinhout, H.1
  • 3
    • 0028548950 scopus 로고
    • Experimental study of threshold voltage fluctuation due to statistical variation of channel dopant number in MOSFET's
    • T. Mizuno et al., "Experimental study of threshold voltage fluctuation due to statistical variation of channel dopant number in MOSFET's", IEEE Trans. on Elec. Dev., vol. 41, pp 2216, 1994
    • (1994) IEEE Trans. on Elec. Dev. , vol.41 , pp. 2216
    • Mizuno, T.1
  • 4
    • 0032164821 scopus 로고    scopus 로고
    • Modelling statistical dopant fluctuations in MOS transistors
    • P.A. Stolk et al., "Modelling statistical dopant fluctuations in MOS transistors", IEEE Trans. on Elec. Dev., vol. 45, pp 1960, 1998
    • (1998) IEEE Trans. on Elec. Dev. , vol.45 , pp. 1960
    • Stolk, P.A.1
  • 5
    • 84907524559 scopus 로고    scopus 로고
    • A new model for threshold voltage mismatch based on the random fluctuations of dopant number in the MOS transistor gate
    • R. Difrenza et al., "A new model for threshold voltage mismatch based on the random fluctuations of dopant number in the MOS transistor gate", ESSDERC 2001, pp 299-302
    • ESSDERC 2001 , pp. 299-302
    • Difrenza, R.1
  • 6
    • 0022693437 scopus 로고
    • First order parameter extraction on enhancement silicon MOS transistors
    • April
    • M.F. Hamer, "First order parameter extraction on enhancement silicon MOS transistors", IEE proceedings, vol. 133, No2, April 1986, pp 49-54
    • (1986) IEE Proceedings , vol.133 , Issue.2 , pp. 49-54
    • Hamer, M.F.1
  • 7
    • 33847640837 scopus 로고    scopus 로고
    • Influence of doping profile and halo implantation on the threshold voltage mismatch of a 0.13μm CMOS technology
    • J.A. Croon et al., "Influence of doping profile and halo implantation on the threshold voltage mismatch of a 0.13μm CMOS technology", ESSDERC 2002, pp 579-582
    • ESSDERC 2002 , pp. 579-582
    • Croon, J.A.1
  • 8
    • 84907853465 scopus 로고    scopus 로고
    • Dependence of channel width and length on MOSFET matching for 0.18 μm CMOS technology
    • R. Difrenza et al., "Dependence of channel width and length on MOSFET matching for 0.18 μm CMOS technology", ESSDERC 2000, pp 584-587
    • ESSDERC 2000 , pp. 584-587
    • Difrenza, R.1
  • 9
    • 0038642443 scopus 로고    scopus 로고
    • Impact of grain number fluctuations in the MOS transistor gate on matching performance
    • R. Difrenza et al., "Impact of grain number fluctuations in the MOS transistor gate on matching performance", ICMTS 2003, pp 244-249
    • ICMTS 2003 , pp. 244-249
    • Difrenza, R.1
  • 10
    • 0032096839 scopus 로고    scopus 로고
    • Gate engineering for deep sub-micron CMOS transistors
    • B. Yu et al., "Gate engineering for deep sub-micron CMOS transistors", IEEE Trans. on Elec. Dev., vol. 45, pp 1243, 1998
    • (1998) IEEE Trans. on Elec. Dev. , vol.45 , pp. 1243
    • Yu, B.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.