A 14-bit 200-MHz current-steering DAC with switching-sequence post-adjustment calibration

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 11, 2007, Pages 2386-2394

  Chen, Tao ^a   Gielen, Georges G E ^b  

^a Mindspeed Technologies   (United States)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Calibration; DAC; Switching sequence; switching sequence post adjustment (SSPA)

Indexed keywords

CALIBRATION METHODS; CHIP IMPLEMENTATIONS; CMOS TECHNOLOGIES; CORE AREAS; CURRENT SOURCES; CURRENT-STEERING; DAC; HIGH-ACCURACY; RESEQUENCING; SAMPLING FREQUENCIES; SIGNAL FREQUENCIES; SWITCHING SEQUENCE; TRADITIONAL CALIBRATIONS;

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; DIGITAL INTEGRATED CIRCUITS; RANDOM ERRORS; SIGNAL PROCESSING; SWITCHING;

CALIBRATION;

EID: 50549093196     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2007.906200     Document Type: Conference Paper

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