메뉴 건너뛰기




Volumn , Issue , 2002, Pages 95-102

Impact of parametiric mismatch and fluctuations on performance and yield of deep-submicron CMOS technologies

(1)  Tuinhout, Hands P a  

a NONE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC SIGNAL SYSTEMS; SIGNAL SYSTEMS; STOCHASTIC SYSTEMS;

EID: 84907709834     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2002.194879     Document Type: Conference Paper
Times cited : (42)

References (8)
  • 1
    • 0022891057 scopus 로고
    • Characterization and modeling of mismatch in MOS transistors for precision analog design
    • K.R. Lakshmikumar, R.A. Hadaway, and M.A. Cope-land, Characterization and Modeling of Mismatch in MOS Transistors for Precision Analog Design," IEEE J. Solid-State Circuits, vol. 21, pp 1057-1066, 1986.
    • (1986) IEEE J. Solid-State Circuits , vol.21 , pp. 1057-1066
    • Lakshmikumar, K.R.1    Hadaway, R.A.2    Copeland, M.A.3
  • 3
    • 0028548950 scopus 로고
    • Experimental study of threshold voltage fluctuation due to statistical variation of channel dopant number in MOSFET's
    • T. Mizuno, J-i. Okamura, and A. Toriumi, "Experimental Study of Threshold Voltage Fluctuation Due to Statistical Variation of Channel Dopant Number in MOSFET's," IEEE Trans. Electron Devices, vol. 41, pp. 2216-2221, 1994.
    • (1994) IEEE Trans. Electron Devices , vol.41 , pp. 2216-2221
    • Mizuno, T.1    Okamura, J.-I.2    Toriumi, A.3
  • 4
    • 84886448106 scopus 로고    scopus 로고
    • Effects of Gate depletion and boron penetration on matching of deep submicron CMOS transistors
    • H. P. Tuinhout, A. H. Montree, J. Schmitz, and P .A. Stolk, "Effects of Gate Depletion and Boron Penetration on Matching of Deep Submicron CMOS Transistors," IEDM 97 Technical Digest, pp .631-635, 1997 .
    • (1997) IEDM 97 Technical Digest , pp. 631-635
    • Tuinhout, H.P.1    Montree, A.H.2    Schmitz, J.3    Stolk, P.A.4
  • 7
    • 17944400303 scopus 로고    scopus 로고
    • CMOS device optimization for mixed-signal technologies
    • P .A. Stolk, and many others, "CMOS Device Optimization for Mixed-Signal Technologies," IEDM 01 Technical Digest, pp .215-218, 2001.
    • (2001) IEDM 01 Technical Digest , pp. 215-218
    • Stolk, P.A.1
  • 8
    • 0038495563 scopus 로고    scopus 로고
    • A comparison of extraction techniques for threshold voltage mismatch
    • J. A. Croon, et al ., "A comparison of extraction techniques for threshold voltage mismatch," Proceedings ICMTS 2002, pp.235-240, 2001.
    • (2001) Proceedings ICMTS 2002 , pp. 235-240
    • Croon, J.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.