Hierarchical modeling, optimization, and synthesis for system-level analog and RF designs

Proceedings of the IEEE

Volumn 95, Issue 3, 2007, Pages 640-669

  Rutenbar, Rob A ^a   Gielen, Georges G E ^b   Roychowdhury, Jaijeet ^c  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c UNIVERSITY OF MINNESOTA   (United States)

Author keywords

Computer aided design; Integrated circuits; Modeling; Simulation

Indexed keywords

COMPUTER AIDED DESIGN; DEGREES OF FREEDOM (MECHANICS); DIGITAL DEVICES; INTEGRATED CIRCUITS; MODELS; SURVEYS;

ALGORITHMIC TECHNIQUES; ANALOG DESIGN AUTOMATION; COMPUTER AIDED MODELING; HIERARCHICAL SYNTHESIS; MANUFACTURING VARIATION; NUMBER OF DEGREES OF FREEDOM; PERFORMANCE SPECIFICATIONS; SIMULATION;

HIERARCHICAL SYSTEMS;

EID: 48949106187     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.2006.889371     Document Type: Article

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