WiCkeD: analog circuit synthesis incorporating mismatch

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2000, Pages 511-514

  Antreich, K ^a   Eckmueller, J ^a   Graeb, H ^a   Pronath, M ^a   Schenkel, F ^a   Schwencker, R ^a   Zizala, S ^a  

^a TECHNICAL UNIVERSITY OF MUNICH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CIRCUIT SYNTHESIS; MISMATCH SENSITIVE ANALOG COMPONENTS; TOLERANCE ANALYSIS;

ELECTRIC CURRENTS; ELECTRIC POTENTIAL; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; MONTE CARLO METHODS; OPTIMIZATION; PARAMETER ESTIMATION; PERFORMANCE; TRANSISTORS;

CMOS INTEGRATED CIRCUITS;

EID: 0033683217     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)